Sub-60 nm deeply-scaled channel length extremely-thin body InxGa1−xAs-on-insulator MOSFETs on Si with Ni-InGaAs metal S/D and MOS interface buffer engineering

We report the first demonstration of sub-60 nm deeply-scaled InGaAs- and InAs-on-insulator MOSFETs on Si substrates with MOS interface buffer engineering and Ni-InGaAs metal source/drain (S/D). The devices provide 400 % I_on enhancement, when comparing to that of an In_0.53Ga_0.47As control device with the same drain-induced-barrier-lowering (DIBL) of 100 mV/V, which is attributable to the mobility enhancement and the S/D parasitic resistance (R_SD) reduction. In addition, InAs-OI MOSFETs with the MOS interface buffer show excellent electrostatic characteristics. A MOSFET with channel length (L_ch) of 55 nm shows small DIBL of 84 mV/V and subthreshold slope (S.S.) of 105 mV/dec, both of which do not significantly degrade with a decrease of L_ch, because of the extremely-thin channel thickness.

Introduction

III-V materials have been actively studied as channel alternatives for n-FET in the future CMOS technology. In order to apply those channel materials to future scaled CMOS, the control of short channel effects (SCEs) is a key issue. Therefore, many recent studies have focused on the introduction of 3-dimensional (3-D) structures into III-V channels such as FinFETs, nanowires, etc. [1]–[4]. We have also developed extremely-thin body (ETB) III-V-OI structures to avoid SCEs [5]–[7]. In ETB MOSFETs however, a mobility degradation with a decrease of body thickness less than 10 nm is a limiting factor to achieve high mobility and good controllability of SCEs at the same time [6], [7]. By increasing the indium content of the . As channel and introducing MOS interface buffer layers [6], [7], we have achieved high peak mobility of 3180 cm²Ns in 3-nm-thick InAs-OI MOSFETs with 3-nm-thick . As buffer layers at the top and bottom of the channel. The indium content increase is also effective for the use of the metal S/D structure because of the reduction of S/D parasitic resistance () through the reduction of the Schottky barrier height (SBH) [8]. However, the immunity against SCEs and the current drive of the InGaAs-OI MOSFETs with less than 100 nm have not been experimentally examined yet.