In recent years FinFET emerges as a promising device to assure the desired performance in the sub-22 nm regime. Among various FinFETs, SOI FinFET shows suppressed leakage current and superior short channel effects. However, it suffers from increased self-heating effect (SHE) due to the adaptation of a low thermal conductivity buried silicon dioxide layer and a ultra thin fin body. Bulk FinFET, on the other hand, mitigates the heating issue at the cost of the leakage current. Body-on-Insulator (BOI) FinFET alleviates, to some extent, the aforementioned downsides of both SOI and bulk FinFET but with the increased fabrication complexity [1]. Here, we report extensive simulation of BOI and SOI FinFETs using technology computer aided design (TCAD) [2] and for the first time, present evaluation of BOI and SOI FinFET based digital circuits and demonstrate that in actuality SHE is comparable for both circuits under low voltage bias.
Abstract:
In summary, we have compared SOI and BOI FinFET device characteristics and the performance of digital circuits designed with those devices. For low voltage supply, SHE is...Show MoreMetadata
Abstract:
In summary, we have compared SOI and BOI FinFET device characteristics and the performance of digital circuits designed with those devices. For low voltage supply, SHE is modest in both devices and during digital circuit operations. SOI FinFET CMOS inverter and SRAM cell characteristics are very similar to BOI ones. Considering the lesser fabrication complexity, SOI FinFET thus would be more preferable than BOI FinFET for the design of low voltage digital circuits.
Date of Conference: 07-09 December 2011
Date Added to IEEE Xplore: 19 January 2012
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Cites in Papers - IEEE (2)
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1.
Azzedin Es-Sakhi, Masud H Chowdhury, "Analytical model to estimate the subthreshold swing of SOI FinFET", 2013 IEEE 20th International Conference on Electronics, Circuits, and Systems (ICECS), pp.52-55, 2013.
2.
Hsin-Chia Yang, Guo-Wei Wu, Wen-Shiang Liao, Wei-Yen Peng, Sung-Ching Chi, Mu-Chun Wang, Shea-Jue Wang, "Next promising P-Type FinFET devices without or with cobalt-silicide applied to the gate", 2013 IEEE 5th International Nanoelectronics Conference (INEC), pp.486-488, 2013.
Cites in Papers - Other Publishers (1)
1.
Sazzad Hussain, Nafis Mustakim, Mehedhi Hasan, Jibesh Kanti Saha, "Performance enhancement of charge plasma-based junctionless TFET (JL-TFET) using stimulated n-pocket and heterogeneous gate dielectric", Nanotechnology, vol.32, no.33, pp.335206, 2021.