I. Introduction
For characterization and testing of highly-integrated mixed-signal devices, low-noise testing environment needs to be achieved to prevent digital switching noise from being coupled to small-amplitude analog signals through a power delivery network (PDN) [1], [2]. It is also important to maintain low jitter and tight timing accuracy for testing high-speed digital devices. Therefore, emphasis is being placed on controlling noise, especially in the interface between a device under test (DUT) and an automatic test equipment (ATE).