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Low-Noise Power Delivery Network Design Using Power Transmission Line for Mixed-Signal Testing | IEEE Conference Publication | IEEE Xplore

Low-Noise Power Delivery Network Design Using Power Transmission Line for Mixed-Signal Testing


Abstract:

With the trend toward higher operating frequencies, the simultaneous switching noise (SSN) problem is being aggravated. The required noise tolerance for testing scenarios...Show More

Abstract:

With the trend toward higher operating frequencies, the simultaneous switching noise (SSN) problem is being aggravated. The required noise tolerance for testing scenarios is more demanding so that it raises the importance of control over SSN in the interface board between a device under test and an automatic test equipment. Low noise is especially important when testing mixed-signal devices, in which noisy digital circuits and noise-sensitive analog circuits share a power delivery network (PDN). To prevent noise coupling between circuits and provide low-noise testing environment, the method of supplying power through transmission lines instead of a voltage plane can be employed. The power transmission line (PTL) not only provides isolation between circuits, but also removes the voltage plane along with its adverse effects such as the cavity resonance and the return path discontinuity. In this paper, the first demonstration of a Constant Current Power Transmission Line (CCPTL)-based single-ended signaling scheme is presented. The measurement results show that the CCPTL-based PDN improves the eye quality at the receiver side as compared to the power-plane-based PDN.
Date of Conference: 16-18 May 2011
Date Added to IEEE Xplore: 19 January 2012
ISBN Information:
Conference Location: Santa Barbara, CA, USA

I. Introduction

For characterization and testing of highly-integrated mixed-signal devices, low-noise testing environment needs to be achieved to prevent digital switching noise from being coupled to small-amplitude analog signals through a power delivery network (PDN) [1], [2]. It is also important to maintain low jitter and tight timing accuracy for testing high-speed digital devices. Therefore, emphasis is being placed on controlling noise, especially in the interface between a device under test (DUT) and an automatic test equipment (ATE).

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References

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