Fabrication of graphene field-effect transistors by simple stripping from CVD-grown layers | IEEE Conference Publication | IEEE Xplore

Fabrication of graphene field-effect transistors by simple stripping from CVD-grown layers


Abstract:

We develop a simple technique to fabricate graphene field-effect-transistor (FET) devices. Our technique is stripping graphene by scotch tape from the chemical vapor depo...Show More

Abstract:

We develop a simple technique to fabricate graphene field-effect-transistor (FET) devices. Our technique is stripping graphene by scotch tape from the chemical vapor deposition (CVD)-grown layer, except the gap region between the source and drain electrode. The current-voltage (I-V) characteristic of a graphene FET before stripping shows a large zero-bias conductance of 6.5 mS and no gate operation. After stripping, the zero gate bias conductance of the device is reduced to 23 μS and a clear gate operation is observed. The change of FET characteristics before and after stripping is due to the formation of a μm size graphene flake. There is large potential that this one-step stripping technique can be extended to a more controllable method to fabricate graphene FET devices.
Date of Conference: 17-20 August 2010
Date Added to IEEE Xplore: 20 January 2011
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Conference Location: Seoul

I. Background

Graphene has extraordinarily large electron mobility and many other unique features which can be applied to the electronic devices [1], [2]. The bandgap of 2-dimensioinal graphene sheets is zero and it prevents effective transistor application. The recent advances report that quasi-one-dimensional graphene ribbons exhibit bandgaps essential for the transistor operation [3], [4]. The graphene ribbon is obtained by several methods such as longitudinal unzipping of carbon nanotubes by a simple solution-based oxidation process [5], e-beam lithographic patterning of graphite [6], scanning tunneling microscope lithographic patterning of graphene [7], and etch mask patterning of graphite by using nanowires [8]. From these methods, they are able to fabricate nano-scale ribbons and to demonstrate good field-effect transistor (FET) characteristics. However, these fabrication procedures are still complicated and are prone to damages.

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