Abstract:
A novel W/TiN/pn-poly-Si gate structure has been developed for merged memory and logic LSIs by using sub-quarter micron pn-poly-Si gate CMOS devices. Low-resistance and t...Show MoreMetadata
Abstract:
A novel W/TiN/pn-poly-Si gate structure has been developed for merged memory and logic LSIs by using sub-quarter micron pn-poly-Si gate CMOS devices. Low-resistance and thermally stable tungsten (W) films were obtained by 5-nm titanium nitride (TiN) film between tungsten film and poly-Si film. This W/TiN/poly-Si gate electrode has a good heat resistance after RTA process at 1000/spl deg/C for 10 seconds. 0.22-/spl mu/m W/TiN/pn-poly-Si gate CMOS devices without interdiffusion through the gate electrode were fabricated by using a simultaneous gate and source/drain (SD) doping process.
Published in: International Electron Devices Meeting. Technical Digest
Date of Conference: 08-11 December 1996
Date Added to IEEE Xplore: 06 August 2002
Print ISBN:0-7803-3393-4
Print ISSN: 0163-1918
