Loading web-font TeX/Math/Italic
Unified Frequency-Domain Analysis of Switched-Series-- Passive Mixers and Samplers | IEEE Journals & Magazine | IEEE Xplore

Unified Frequency-Domain Analysis of Switched-Series-RC Passive Mixers and Samplers


Abstract:

A wide variety of voltage mixers and samplers are implemented with similar circuits employing switches, resistors, and capacitors. Restrictions on duty cycle, bandwidth, ...Show More

Abstract:

A wide variety of voltage mixers and samplers are implemented with similar circuits employing switches, resistors, and capacitors. Restrictions on duty cycle, bandwidth, or output frequency are commonly used to obtain an analytical expression for the response of these circuits. This paper derives unified expressions without these restrictions. To this end, the circuits are decomposed into a polyphase multipath combination of single-ended or differential switched-series-RC kernels. Linear periodically time-variant network theory is used to find the harmonic transfer functions of the kernels and the effect of polyphase multipath combining. From the resulting transfer functions, the conversion gain, output noise, and noise figure can be calculated for arbitrary duty cycle, bandwidth, and output frequency. Applied to a circuit, the equations provide a mathematical basis for a clear distinction between a “mixing” and a “sampling” operating region while also covering the design space “in between.” Circuit simulations and a comparison with mixers published in literature are performed to support the analysis.
Page(s): 2618 - 2631
Date of Publication: 06 May 2010

ISSN Information:

References is not available for this document.

I. Introduction

In radio front ends, mixers normally perform frequency conversion, with continuous-time input and output signals. Samplers convert a continuous-time input into a discrete-time output signal but can also provide frequency conversions (aliasing). Mixing and sampling seem to be quite different functions and are analyzed differently but can be implemented by similar circuits. Some examples are shown in Fig. 1.

Switched- application examples. (a) Switching mixer. (b) Sampling mixer/track and hold. (c) In-phase/Quadrature mixer with (d) polyphase clocks A–F.

Select All
1.
M. C. M. Soer, E. A. M. Klumperink, Z. Ru, F. E. van Vliet and B. Nauta, "A 0.2-to-2.0 GHz 65 nm CMOS receiver without LNA achieving \$>\$11 dBm IIP3 and \$<\$6.5 dB NF", Proc. IEEE ISSCC Dig. Tech. Papers, vol. 52, pp. 222-223, 2009.
2.
X. He, J. van Sinderen and R. Rutten, "A45 nm WCDMA transmitter using direct quadrature voltage modulator with highoversampling digital front-end", Proc. IEEE ISSCC Dig. Tech. Papers, vol. 53, pp. 62-63, 2010.
3.
Z. Ru, E. Klumperink and B. Nauta, "A discrete-time mixing receiver architecturewith wideband harmonic rejection", Proc. IEEE ISSCC Dig. Tech. Papers, vol. 51, pp. 322-323, 2008.
4.
C. Andrews and A. Molnar, "A passive-mixer-first receiverwith baseband-controlled RF impedance matching \$<\$6 dB NF and \$>\$ 27dBm wideband IIP3", Proc. IEEE ISSCC Dig. Tech. Papers, vol. 53, pp. 46-47, 2010.
5.
S. Chehrazi, A. Mirzaei and A. Abidi, "Noise in current-commutating passive FETmixers", IEEE Trans. Circuits Syst. I Reg. Papers, vol. 57, no. 2, pp. 332-344, Feb. 2010.
6.
T. Sowlati, B. Agarwal, J. Cho, T. Obkircher, M. El Said, J. Vasa, et al., "Single-chip multiband WCDMA/HSDPA/HSUPA/EGPRStransceiver with diversity receiver and 3G DigRF interface without SAW filtersin transmitter/3G receiver paths", Proc. IEEE ISSCC Dig. Tech. Papers, vol. 52, pp. 116-117, 2009.
7.
Z. Ru, E. Klumperink, G. Wienk and B. Nauta, "Asoftware-defined radio receiver architecture robust to out-of-band interference", Proc. IEEE ISSCC Dig. Tech. Papers, vol. 52, pp. 232-233, 2008.
8.
G. Xu and J. Yuan, "Alow-voltage high-speed sampling technique", Proc. IEEE Int. Conf. ASIC, pp. 228-231, 2001.
9.
A. R. Shahani, D. K. Shaeffer and T. H. Lee, "A 12-mW wide dynamic rangeCMOS front-end for a portable GPS receiver", IEEE J. Solid-State Circuits, vol. 32, no. 12, pp. 2061-2070, Dec. 1997.
10.
B. Leung, VLSI for Wireless Communication, NJ, Englewood Cliffs:Prentice-Hall, 2002.
11.
A. Parssinen, R. Magoon, S. I. Long and V. Porra, "A 2-GHz subharmonic sampler for signal downconversion", IEEE Trans. Microw. Theory Tech., vol. 45, no. 12, pp. 2344-2351, Dec. 1997.
12.
R. Gregorian and G. Temes, Analog MOS Integrated Circuits for Signal Processing, New York:Wiley, 1986.
13.
Product detector and method therefor, May 2001.
14.
B. W. Cook, A. Berny, A. Molnar, S. Lanzisera and K. S. J. Pister, "Low-power 2.4-GHz transceiver with passiveRX front-end and 400-mV supply", IEEE J. Solid-State Circuits, vol. 41, no. 12, pp. 2757-2766, Dec. 2006.
15.
M. Liou and Y. Kuo, "Exact analysis of switched capacitor circuits with arbitraryinputs", IEEE Trans. Circuits Syst., vol. CAS-26, no. 4, pp. 213-223, Apr. 1979.
16.
A. Opal and J. Vlach, "Analysisand sensitivity of periodically switched linear networks", IEEE Trans. Circuits Syst., vol. 36, no. 4, pp. 522-532, Apr. 1989.
17.
T. Strm and S. Signell, "Analysis of periodically switchedlinear circuits", IEEE Trans. Circuits Syst., vol. CAS-24, no. 10, pp. 531-541, Oct. 1977.
18.
G. Gildenblat, X. Lin, W. wu, H. Wang, A. Jha, R. van Langevelde, et al., "PSP: An advanced surface-potential-based MOSFET model forcircuit simulation", IEEE Trans. Electron Devices, vol. 53, no. 9, pp. 1979-1993, Sep. 2006.
19.
S. Zhou and M. F. Chang, "ACMOS passive mixer with low flicker noise for low-power direct-conversionreceiver", IEEE J. Solid-State Circuits, vol. 40, no. 5, pp. 1084-1093, May 2005.
20.
P. Y. Chan, A. Rofougaran, K. A. Ahmed and A. A. Abidi, "A highly linear 1-GHz CMOS downconversion mixer", Proc. Eur. Solid State Circuits Conf., pp. 210-213, 1993.
21.
C. L. Phillips and J. M. Parr, Signals Systems and Transforms, NJ, Englewood Cliffs:Prentice-Hall, 1995.
22.
I. Gradshteyn and I. Ryzhik, Table of Integrals Series and Products, New York:Academic, 1994.
Contact IEEE to Subscribe

References

References is not available for this document.