I/Q imbalance effects in quadrature ΣΔ modulators — Analysis and signal processing

This article focuses on the in-phase/quadrature (I/Q) imbalance problem in quadrature ΣΔ modulators (QΣΔM). In the literature, such quadrature modulators have been seen as a promising possibility for software defined radio (SDR) receivers, but matching the quadrature circuits is an inevitable problem for this kind of systems. In this article, an analytic closed-form model will be derived for a mismatched first order QΣΔM by means of the modulator transfer functions and the underlying implementation components. In addition, notching the signal transfer function (STF) on the desired signal mirror frequency inside the modulator is proposed for cancelling the mirror frequency interference originating from the blocking signal on that band. This is shown to be effective in case of the modulator feedback branch mismatches and can be implemented with simple additional feedforward coefficient(s) compared to ordinary modulator.

I. Introduction

The co-existence of various existing and emerging wireless communication systems has driven the radio transceiver development towards multi-standard solutions with maximized hardware reuse and reconfigurability. In addition, the hardware implementations should have high integration capability, low power dissipation and small manufacturing costs [1]. Altogether, this is leading towards the SDR concept [2], [3]. In the literature, the low-IF receiver architecture [4] is found to be the most feasible solution for practical implementations on the terminal side in many respects. From the analog-to-digital converter (ADC) point of view, on the other hand, bandpass architecture has been seen as a potential choice for meeting the aforementioned receiver requirements [3], [5]–[7].