Lead-Free Solder Material and Chip Thickness Impact on Board-Level Reliability for Low-K WLCSP

This paper evaluates the effect of the solder ball material and chip thickness on board-level reliability using low-K wafer-level chip-scale packaging (WLCSP). The composition of the three evaluated solder ball materials includes SnAg_1.0Cu_0.5, SnAg_2.0Cu_0.5, and SnAg_2.6Cu_0.6. The chip thickness is ranging from 200, 300, and 775 ¿m. Initially, the high temperature storage and ten-time multiple reflow tests were used as the wafer-level reliability test items. The work uses both the low speed (500 ¿m/s) and the high speed (200 mm/s and 1 m/s) solder ball shear test to compare the shear force, displacement, and fracture energy of the three solder compositions. The high speed shear test result shows the high silver content correlates to small displacement and the low fracture energy. Next, the finite element model was employed to compare the board level chip and solder ball stress for these three different chip thicknesses. The finite element method simulation results indicate the thinner chip implies the preferred thermal fatigue cycles. In addition, the drop test results show the chip thickness of 200 and 300 ¿m improve the drop test performance (81 drops and 88 drops) by 20.9%-31.34% than that of chip thickness of 775 ¿m. Moreover, the chip thickness of 200 and 300 ¿m substantially enhance the thermal fatigue life (665 cycles and 655 cycles) by 81.44%-84.21% than that of chip thickness of 775 ¿m using the SnAg_1.0 Cu_0.5. Notably, the experimental results correlate well with the simulation trend. This work provides a design guideline for selecting the favorable solder materials and the chip thickness to obtain the satisfactory board-level reliability of the low-K WLCSP packaging.

I. Introduction

Wafer-Level chip-scale packaging (WLCSP) fulfills the demand for small, light, and portable handheld electronic devices, and is one of the most advanced packaging concepts. The board-level reliability is the key issue for WLCSP, especially for the evaluation of the thermal fatigue life of the solder joints. Many papers have discussed the topic of board-level reliability of WLCSP [1]–[8]. However, most of these papers focused on evaluating the fatigue life of solder joints for non-low-K WLCSP. This work evaluated the effect of three solder ball materials and three chip thicknesses on the board-level reliability, including the high temperature storage test (HTST) and ten-time multiple reflow test were used as the wafer-level reliability test items. Besides, the drop test and temperature cycling test (TCT, C–125 °C) were used as the board-level reliability test items for the low-K WLCSP. Three solder ball materials and the three chip (packaging) thicknesses are evaluated in the work.