Abstract:
A 3-transistor non-volatile analog storage cell with 14 bits effective resolution and rail-to-rail buffered voltage output is presented. The memory, which consists of cha...Show MoreMetadata
Abstract:
A 3-transistor non-volatile analog storage cell with 14 bits effective resolution and rail-to-rail buffered voltage output is presented. The memory, which consists of charge stored on a MOS transistor floating gate, is written by means of hot-electron injection and erased by means of gate oxide tunneling. The circuit allows simultaneous memory reading and writing; by writing the memory under feedback control, errors due to oxide mismatch or trapping can be nearly eliminated, Small size and low power consumption make the cell especially attractive for use in analog neural networks. The cell is fabricated in a 2 /spl mu/m n-well silicon Bi-CMOS process available from MOSIS,.
Date of Conference: 30 April 1995 - 03 May 1995
Date Added to IEEE Xplore: 06 August 2002
Print ISBN:0-7803-2570-2
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