Abstract:
The stress induced tunnel oxide leakage current occurring in NAND EEPROM memory cells after a large number of WRITE/ERASE (W/E) cycles has been investigated for different...Show MoreMetadata
Abstract:
The stress induced tunnel oxide leakage current occurring in NAND EEPROM memory cells after a large number of WRITE/ERASE (W/E) cycles has been investigated for different W/E pulses. A model for the stress induced leakage current is proposed in which the presence of both holes and neutral oxide traps are a necessary condition for the stress induced leakage current to occur.
Date of Conference: 30 April 1996 - 02 May 1996
Date Added to IEEE Xplore: 06 August 2002
Print ISBN:0-7803-2753-5
