Adaptive Pole-Zero Position (APZP) Technique of Regulated Power Supply for Improving SNR

This paper proposes an adaptive pole-zero position (APZP) technique to achieve excellent transient response of dc--dc converters. The APZP technique triggers the two-step nonlinear control mechanism to speed up the transient response at the beginning of load variations. Before the output voltage is regulated back to its voltage level, the APZP technique merely functions as a linear control method to regulate output voltage in order to ensure the stability of the system. Fast transient response time, low output ripples, and stable transient operation are achieved at the same time by the proposed APZP technique. Experimental results in the UMC 0.18- mum process show that the transient undershoot/overshoot voltage and the recovery time do not exceed 48 mV and 10 mus , respectively. Compared with conventional design without any fast transient technique, the performances of overshoot voltage and recovery time are enhanced by 37.2% and 77.8%. With the APZP technique, the performance of dc--dc converters is improved significantly.

I. Introduction

Among the numerous requirements included in the ability to build high-performance system-on-chip (SoC) applications, the imperative demand is to supply a dynamic voltage in terms of the processing throughputs. Dynamic voltage scaling (DVS) technique is the most popular power-management technique for reducing power loss of SoC applications. Hence, the design consideration for dc–dc converters with good transient performance is necessary to provide good dynamic performance and simultaneously ensure the regulator's stability. In other words, several techniques are demanded for improving transient response time and voltage ripples in order to ensure low supply voltage ripple and maintain a reliable supply voltage to SoC applications.