Analysis of the DC-link capacitor voltage spectrum in the cascaded multilevel STATCOM | IEEE Conference Publication | IEEE Xplore

Analysis of the DC-link capacitor voltage spectrum in the cascaded multilevel STATCOM


Abstract:

A general expression for the spectrum of the DC-link capacitor voltage in the cascaded multilevel STATCOM is presented, and to predict the amplitude and frequency of the ...Show More

Abstract:

A general expression for the spectrum of the DC-link capacitor voltage in the cascaded multilevel STATCOM is presented, and to predict the amplitude and frequency of the voltage harmonic components produced by balanced AC power voltage and current. The computation is developed using the switching functions approach, relating DC-link current, SPWM control pulse and the output AC current. Especially, the 2-th voltage harmonic is discussed in detail. Consideration of the voltage ripple, the required capacitance value and the voltage reference value are presented.
Date of Conference: 21-24 April 2008
Date Added to IEEE Xplore: 26 August 2008
ISBN Information:
Conference Location: Chengdu

1. Introduction

In recent years, multilevel inverters have drawn tremendous interest in the field of high-voltage and high-power applications such as the static synchronous compensator (ST ATCOM) applications. Referring to the literature reviews in [3] [4], the cascaded multilevel converter (CMC) with separated DC capacitors is clearly the most feasible topology for use as a power converter in STATCOM applications and there are many advantages described in [4]. The cascaded converter topology not only simplifies hardware manufacturability, but also makes the entire system flexible in terms of power capability. However, those challenges researchers how to improve its dynamic responses and balance its DC buses due to excessive amount of capacitors. Up to date, several literatures have discussed configuration and control strategy of the cascaded multilevel STATCOM. Such control theme and dynamic properties are studied, and also the capacitor voltage balance control theme is proposed in [3] [6] [9]. The system model and another control theme are proposed in [2]. A simple formula is proposed to calculate the required capacitance of the capacitor in DC link of each single H-bridge inverter in [4]. Another novel control themes to reduce the EMI are proposed in [5] [7] [8] [9].

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