Novel hysteretic control method for multiphase voltage regulators

The faster dynamic response is one of the big challenges for the future microprocessor voltage regulators (VR). The hysteretic control method is one of the fastest control methods but it’s hard to be used in multiphase VR because of the difficulty to achieve the constant switching frequency and the interleaving operation among the phases. To resolve this, the novel hysteretic control method is proposed. By slowly adjusting the hysteretic band width through the phase locked loop (PLL), the duty cycle is synchronized with an external fixed frequency clock reference. By phase shifting this external clock reference for each phase, the interleaving among the paralleled phases can be easily implemented. On the other hand, slow hysteretic band width changing will make this controller perform as the conventional hysteretic control during the transient for the fast dynamic response. After the transient, each phase will be pulled back to interleaving status through its band width adjustment. The analysis and design guide of the proposed control is provided and it is verified with the hardware.

I. Introduction

The voltage regulator (VR) powering the next generation microprocessor faces the stringent challenges such as the higher current and the lower voltage demand. Furthermore, the processor performs as a fast dynamic load with high di/dt current slew rate. In order to deal with this fast dynamic load requirement, the speed of the VR, which is determined by the control, should be higher, otherwise, the huge amount of output capacitors are necessary [1], which will increase the cost and the real estates of the motherboard.