Silicon-chip single and coupled coplanar transmission line measurements and model verification up to 50GHz

Silicon technology on-chip single and coupled coplanar transmission lines have been measured on wafer up to 50 GHz. De-embedding was performed using various methods including the L-2L technique [1,2] by measuring two transmission lines of original and double length. A novel approach has been used for the measurement of the coupled structures using conventional two port VNA. Results are investigated both in S-parameter format and in gamma-Zo format, and compared with EM solver and the parametric IBM coplanar T-line device models discussed elsewhere [3,4] which are available in IBM CMOS and SiGe technology design kits. A comparison with RC model shows the limits of RC model validity, in frequency domain.

Introduction

High-speed silicon chips successfully operate nowadays at frequencies up to 50 GHz and beyond, considering technologies such as SiGe and SOI CMOS. While microstrip T-lines [1] are used more in SiGe RF and millimeter wave designs, coplanar transmission lines [4] are used more in RF CMOS and high speed CMOS digital designs, where the high density Manhattan wire structure prevents from using the bottom metallic shield in most cases.