Electron Beam Testing of VLSI Packaging Substrates

Significant advances in packaging technology have been achieved in recent years to meet the performance improvements offered by the VLSI components. One such advancement is the replacement of circuit boards and cards with multi-layer packaging substrates to interconnect the chip arrays. In this technology layers of insulating material such as ceramic, epoxy-glass or polyimide embedded with conductive lines and vias are laminated to form a 3-dimensional interconnecting network.