Abstract:
The performance of diodes fabricated on n-type and p-type Si substrates by implanting As or B through a low-resistivity titanium-silicide layer is discussed. The effects ...Show MoreMetadata
Abstract:
The performance of diodes fabricated on n-type and p-type Si substrates by implanting As or B through a low-resistivity titanium-silicide layer is discussed. The effects of varying the implant dose, energy, and postimplant thermal treatment were investigated. After implantation, a rapid thermal anneal was found to remove most of the implant damage and activate the dopants, which resulted in n/sup +/-p and p/sup +/-n junctions under a low-resistivity silicide layer. The n/sup +/-p junctions were as shallow as 1000 AA with reverse leakage currents as low as 5.5 mu A/cm/sup 2/. A conventional furnace anneal resulted in a further reduction of this leakage. Shallow p/sup +/-n junctions could not be formed with boron implantation because of the large projected range of boron ions at the lowest available energy. Ti silicide films thinner than 600 AA exhibited a sharp rise in sheet resistivity after a furnace anneal, whereas thicker films exhibited more stable behavior. This is attributed to coalescence of the films. High-temperature furnace annealing diffused some of the dopants into the silicide film, reducing the surface concentrations at the TiSi/sub 2/-Si interface.<>
Published in: IEEE Transactions on Electron Devices ( Volume: 37, Issue: 1, January 1990)
DOI: 10.1109/16.43815
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1.
C. K. Lau, IEDM Tech. Dig., pp. 714, 1982.
2.
M. E. Alperin, IEEE J. Solid State Circuits, vol. SC-20, pp. 61, 1985.
3.
J. Hui, S. Wong and J. Moll, IEEE Electron Device Lett., vol. EDL-6, pp. 479, 1985.
4.
F. J. Lai, J. Y. Sun and S. H. Dhong, IEEE Trans. Electron Devices, vol. ED-33, pp. 345.
5.
S. P. Murarka, M. H. Read, C. J. Doherty and D. B. Fraser, J. Electrochem. Soc., vol. 129, pp. 293, 1982.
6.
R. Liu, D. S. Williams and W. T. Lynch, Proc. IEDM 86, pp. 58, 1986.
7.
N. de Lanerolle, D. Hoffman and D. Ma, J. Vac. Sci. Tech. (B), vol. 5, pp. 1689, 1987.
8.
H. K. Park, J. Sachitano, M. McPherson, T. Yamaguchi and G. Lehman, J. Vac. Sci. Tech. (A), vol. 2, pp. 264, 1984.
9.
P. Revesz, J. Gyimesi and E. Zsoldos, J. Appl. Phys., vol. 54, pp. 1860, 1983.
11.
F. d'Heurle, E. A. Irene and C. Y. Ting, Appl. Phys. Lett., vol. 42, pp. 361, 1983.
12.
P. Gas, V. Deline, F. M. d'Heurle and G. Scilla, J. Appl. Phys., vol. 60, pp. 1634, 1986.
13.
V. Probst, H. Schaber, P. Lippens, L. Van den hove and R. De Keersmaecker, Appl. Phys. Lett., vol. 52, pp. 1803, 1988.
14.
L. Rubin, 1988.
15.
A. H. van Ommen, H. J. W. van Houtum and A. M. L. Theunissen, J. Appl. Phys., vol. 60, pp. 627, 1986.
16.
S. P. Murarka, Silicides for VLSI Applications, New York:Academic, pp. 78, 1983.
17.
R. K. Shukla and L. S. Multani, IEEE V-MIC Conf., pp. 470, 1987.
18.
C. Y. Ting, F. M. d'Heurle, S. S. Iyer and P. M. Fryer, J. Electrochem. Soc., vol. 133, pp. 2621, 1986.
19.
L. Rubin, N. Herbots, J. Gutierrez, D. Hoffman and D. Ma, Mater. Res. Soc Symp. Proc., vol. 146, 1989.
21.
M. Finctti, S. Gucrri, P. Negrini and A. Scorzoni, Thin Solid Films, vol. 130, pp. 37, 1985.
23.
J. Amano, K. Nauka, M. P. Scott and J. E. Turner, Appl. Phys. Lett., vol. 49, pp. 737, 1986.
24.
T. E. Seidel, "Ion implantation" in VLSI Technology, New York:McGraw-Hill, pp. 231, 1983.
25.
S. M. Sze, Physics of Semiconductor Devices, New York:Wiley, pp. 91, 1981.