Low-Temperature Transport Characteristics and Quantum-Confinement Effects in Gate-All-Around Si-Nanowire N-MOSFET

Gate-all-around n-MOSFETs with Si-nanowire (~7 nm) as the channel body are fabricated and characterized for their low-temperature behavior (~5 K to 295 K). I_DS-V_GS characteristics at low V_DS (~50 mV) exhibit a decrease in current with decreasing temperature in strong inversion up to about ~200 K. However, at high V_DS, drain current reverts to typical temperature behavior, i.e., I_DS increases with the reducing temperature due to the increase in phonon-limited mobility (mu_ph)- It is inferred that, at low V_DS the enhancement in mu_ph at a reduced temperature could be possibly masked by the intersubband scattering on account of subband splitting due to quantum-confinement effects as indicated by subband calculations for nanowire structures.

I. Introduction

Silicon nanowires (SiNWs) are attractive for many nanoelectronic applications, including those as channel bodies in field-effect-transistors (FETs) [1]–[5]. Several approaches including bottom–up approaches [6]–[8] and top–down approaches [2]–[4], [9] have been reported for realization of nanowire-based devices. As these nonplanar device architectures tend to emerge for CMOS and other novel applications, comprehensive assessment of carrier transport mechanisms assumes importance. These devices provide a unique opportunity to probe the quantum mechanical effects on carrier transport in low dimensions. Oscillations in and mobility at very low (0.2 mV) and low temperature for trigated FETs with fin have been reported [10], [11].