Loading [MathJax]/extensions/MathMenu.js
A Single-VCO Fractional-N Frequency Synthesizer for Digital TV Tuners | IEEE Conference Publication | IEEE Xplore

A Single-VCO Fractional-N Frequency Synthesizer for Digital TV Tuners


Abstract:

A single-VCO fractional-N frequency synthesizer is designed for DVB-T and ISDB-T Digital TV tuners. This frequency synthesizer architecture can cover all the frequency ba...Show More

Abstract:

A single-VCO fractional-N frequency synthesizer is designed for DVB-T and ISDB-T Digital TV tuners. This frequency synthesizer architecture can cover all the frequency bands for both standards with only one VCO and thus the chip area as well as the power consumption can be greatly reduced. The synthesizer was fabricated in a 0.18 mum CMOS process with a 2.2 V power supply and occupies an area of 1.5 mm2. The loop bandwidth is 300 kHz and the total setting time is smaller than 70 mus.
Date of Conference: 03-08 June 2007
Date Added to IEEE Xplore: 02 July 2007
ISBN Information:
Print ISSN: 0149-645X
Conference Location: Honolulu, HI, USA
References is not available for this document.

I. Introduction

The Digital TV (DTV) standard has ushered in a new era in TV broadcasting and raised a great demand for DTV tuners. There are many challenges in designing a DTV tuner, of which the most difficult part is the frequency synthesizer. The synthesizer has three main challenges: the first and most troublesome one is the wide tuning range. The synthesizer needs to cover from to for ISDB-T in Japan and DVB-T in Europe. The second challenge is the phase noise requirement. Because of the wide tuning range, the VCO in the synthesizer needs to have to very large VCO gain , and therefore becomes quite sensitive to the noise voltage on the control line. The third one is the narrow channel spacing, which is in DVB-T and as well as 3/7 MHz in ISDB-T. Narrow channel spacing leads to large division ratio that inevitably raises the in-band phase noise. The most popular way to resolve these problems is using multi-VCOs to cover different frequency bands. However, doing so not only draws more power but also increases chip area, which is not a satisfactory solution.

Select All
1.
M. Marutani, et al., "An 18mW 90 to 770MHz Synthesizer with Agile Auto-Tuning for Digital TV-Tuners," ISSCC Dig. Tech. Papers, paper no. 11.1, Feb. 2006
2.
Y.-C. Yang, S.-A. Yu, Y.-H Liu, T. Wang, and S.-S. Lu, "A Quantization Noise Suppression Technique for ΔΣ FractionalN Frequency Synthesizers," J. Solid-State Circuits, vol. 41, pp.2500-pp.2511, Nov. 2006.
3.
S. Levantino, C. Samori, A. Bonfanti, S. L. J. Gierkink, A. L. Lacaita, and V. Boccuzzi, "Frequency Dependence on Bias Current in 5-GHz CMOS VCOs: Impact on Tuning Range and Flicker Noise Upconversion," J. Solid-State Circuits, vol. 37, pp.1003-pp.1011, Aug. 2002.
4.
W.B. Wilson, U. -K. Moon, K. R. Lakshmikumar, and L. Dai, "A CMOS Self-Calibrating Frequency Synthesizer," IEEE J. Solid-State Circuits, vol. 35, NO. 10, pp.1437-1444, Oct. 2000.
5.
Y. Koo, et al, "A Fully Integrated CMOS Frequency Synthesizer With Charge-Averaging Charge Pump and Dual-Path Loop Filter for PCS- and Cellular-CDMA Wireless System," J. Solid-State Circuits, vol. 37, pp.536-542, May 2002.

Contact IEEE to Subscribe

References

References is not available for this document.