40GHz Wide-Locking-Range Regenerative Frequency Divider and Low-Phase-Noise Balanced VCO in 0.18μm CMOS

A 40GHz wide-locking-range frequency divider and a low-phase-noise VCO are implemented in 0.18mum CMOS technology. The frequency divider demonstrates a locking range of 10.6GHz with 0dBm input power while the VCO exhibits a phase noise of -108.65dBc/Hz at 1MHz offset. Each of the 2 circuits consumes 6mW from a 1V supply.

Frequency dividers and VCOs are the most critical building blocks for the implementation of high-frequency signal sources that are widely used in wireline and wireless communication systems. In this paper, circuit topologies are presented to improve the performance of these high-frequency components. For the frequency divider, the proposed g_m-enhancement technique incorporates the series and shunt inductive peaking in the resonator design. With the regenerative mechanism in the injection-locked frequency divider, a wide locking range can be achieved without using varactors for frequency tuning. As for the VCO, a balanced architecture is proposed for low phase noise while relaxing the stringent requirement on the start-up conditions at higher frequencies. Both of the circuits are designed and fabricated in a CMOS process.