1. Introduction
Continued device scaling has dramatically increased the statistical variability with which tomorrow's circuits must contend. In a few special cases, we have analytical methods that can give us the deterministic answers we seek, e.g., optimal sizing and threshold assignment in combinational logic under statistical yield and timing constraints [1]. Unfortunately, such analytical solutions remain rare. In the general case, some combination of complex statistics, high dimensionality, profound nonlinearity or non-normality, stringent accuracy, and expensive performance evaluation (e.g., detailed simulation) thwart our analytical aspirations. What remains are the Monte Carlo methods [2].