Dual Mode Architecture for Deblocking Filtering in H.264/AVC Video Coding

Block based video codecs suffer from visible blocking artifacts in the reconstructed video frames. Eliminating the blocking artifacts improves output video quality, significantly. New video coding standards employ adaptive filtering tools to solve this problem. Because of huge computational load of these tools they became the implementation bottlenecks in real-time applications. This paper proposes a high-performance deblocking architecture suited for both dedicated hardware and platform-based implementation of H.264/AVC video codecs. The new architecture supports two operational modes for high-performance and low-power filtering. Working at high-performance mode, the proposed architecture offers 44% to 76% performance improvement compared to the existing state-of-the-art architectures. Half of this performance is achieved while working at low-power mode. In the low-power mode, however, up to 41% of power is saved. Operating at 100MHz, the new architecture supports processing resolution of 2208 times 2000 (4:2:0) at 30 fps

I. Introduction

H.264/AVC [1] is the latest standard in the sequence of video coding standards. In contrast to traditional standards, the new one offers more video quality and coding efficiency. The reason behind superior coding efficiency of H.264/AVC is the use of new coding tools. When these tools are used in an optimized mode allow for bit savings of about 50% compared to previous video coding standards like MPEG-4 and MPEG-2 for a wide range of bit rates and resolutions. This improvement, however, come at the cost of more computational complexity. The decoder is about two times as complex as an MPEG-4 Visual decoder for the simple profile [2]. In-loop deblocking filter tool used in both H.264/AVC encoding and decoding sides has a profound impact on conceptual video quality [3]. Experimental results show that one third of the decoder computational complexity is consumed by the deblocking filtering tools [4]. It becomes an implementation bottleneck for real-time applications. Therefore, designing high-performance deblocking filter architectures is a key issue. Recently, there are many proposed architectures for deblocking filtering in H.264/AVC video coding in the literature [5] – [10].