Contents 1. Introduction
The Arrayed waveguide gratings (AWG) Multiplexer/De-multiplexer based on silicon substrate planar light-wave circuit (PLC) technology is a very promising device because of its low insertion loss, compact size, highly stable performance, easy to mass product and integrated with other functional components, potential low cost, etc[1]. But the crosstalk performance of a practical AWG is worse than predicted theoretically. So it is very critical and also most challenged to reduce the crosstalk level. Basically, the total crosstalk comes from adjacent and non-adjacent channel crosstalk level of AWG devices between its arrayed waveguides, and can be reduced through the proper waveguide structure optimization and fabrication processing improvement. There are many mechanisms for the degradation of channel crosstalk performance, such as mutual coupling between output waveguides, truncation due to finite width of an array aperture, and phase errors in a waveguide array. The mutual coupling and the truncation can be effectively reduced by proper AWG structure parameters optimization. And then, the random phase errors introduced into the arrayed waveguides become the primary reason for the worse crosstalk performance. The random phase errors are usually caused by the imperfection of fabrication processing and poor resolution of a photo mask, and are more difficult to reduce.[2], [3]
