Abstract:
In this paper we will present an algorithm that is capable of recognizing symmetry in an electronic network graph in better than O((n+b)/sup 2/) time for typical circuits...Show MoreMetadata
Abstract:
In this paper we will present an algorithm that is capable of recognizing symmetry in an electronic network graph in better than O((n+b)/sup 2/) time for typical circuits. Applications in symbolic analysis and behavioural modeling are presented.<>
Date of Conference: 30 May 1994 - 02 June 1994
Date Added to IEEE Xplore: 06 August 2002
Print ISBN:0-7803-1915-X
Citations are not available for this document.
Cites in Papers - |
Cites in Papers - IEEE (9)
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2.
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Michael Eick, Martin Strasser, Kun Lu, Ulf Schlichtmann, Helmut E. Graeb, "Comprehensive Generation of Hierarchical Placement Rules for Analog Integrated Circuits", IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, vol.30, no.2, pp.180-193, 2011.
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Qinsheng Hao, Sheqin Dong, Song Chen, Xianlong Hong, Yi Su, Zhiyi Qu, "Constraints generation for analog circuits layout", 2004 International Conference on Communications, Circuits and Systems (IEEE Cat. No.04EX914), vol.2, pp.1339-1343 Vol.2, 2004.
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Cites in Papers - Other Publishers (1)
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Martin Strasser, Michael Eick, Helmut Graeb, Ulf Schlichtmann, "Deterministic Analog Placement by Enhanced Shape Functions", Analog Layout Synthesis, pp.95, 2011.
