I. Introduction
One of the main challenges in very large scale integration testing has been the rapid increase in test data volume especially in system-on-a-chip designs [2]. More test data volume leads to higher tester memory requirements and longer test times when the testing is performed using conventional external testers, i.e., automated test equipment. This directly affects the test costs of a chip. Reducing the test data volume by compression techniques is an attractive approach for dealing with this problem. The test data are stored in compressed form on the tester and transferred to the chip where it is decompressed using an on-chip decompressor.