Abstract:
Two second-order bandpass delta-sigma A/D modulators have been implemented in a 0.8 /spl mu/ BiCMOS process to demonstrate the feasibility of converting a 10.7 MHz radio ...Show MoreMetadata
Abstract:
Two second-order bandpass delta-sigma A/D modulators have been implemented in a 0.8 /spl mu/ BiCMOS process to demonstrate the feasibility of converting a 10.7 MHz radio IF signal to digital form. The circuits, based on switched-capacitor biquads, demonstrated 57 dB SNR in a 200 kHz bandwidth when clocked at 42.8 MHz, dissipating 60 mW from a 5 V supply. The two modulators use different clocking strategies to allow evaluation of a tradeoff between active and passive sensitivities.<>
Published in: IEEE Journal of Solid-State Circuits ( Volume: 30, Issue: 3, March 1995)
DOI: 10.1109/4.364431