Abstract:
The system described is a real-time edge detector for use in image processing. The edge-detection algorithm is a 3/spl times/3 Sobel operator and adopts a new circuit of ...Show MoreMetadata
Abstract:
The system described is a real-time edge detector for use in image processing. The edge-detection algorithm is a 3/spl times/3 Sobel operator and adopts a new circuit of adding to orientation information. The hardware is designed to work at the 10 MHz pixel rate, and will accommodate images of 512/spl times/512 pixels at frames/s with noninterlaced video, or of up to 512/spl times/290 pixels with interlaced scanning. The hardware is pipelined and paralleled to achieve the required speed. 20 ms is needed to process a 512/spl times/290 pixels grey-level image. It may be used in military reconnaissance, TV real-time tracking or industry inspection.<>
Published in: Proceedings of TENCON '93. IEEE Region 10 International Conference on Computers, Communications and Automation
Date of Conference: 19-21 October 1993
Date Added to IEEE Xplore: 06 August 2002
Print ISBN:0-7803-1233-3
Leveraging Negative Capacitance CNTFETs for Image Processing: An Ultra-Efficient Ternary Image Edge Detection Hardware
Fereshteh Behbahani,Mohammad Khaleqi Qaleh Jooq,Mohammad Hossein Moaiyeri,Khalil Tamersit
Correction to “Leveraging Negative Capacitance CNTFETs for Image Processing: An Ultra-Efficient Ternary Image Edge Detection Hardwareâ€
Fereshteh Behbahani,Mohammad Khaleqi Qaleh Jooq,Mohammad Hossein Moaiyeri,Khalil Tamersit
A Hardware Scheduler Based on Task Queues for FPGA-Based Embedded Real-Time Systems
Yi Tang,Neil W. Bergmann
Fast and Resource-Efficient Hardware Implementation of Modified Line Segment Detector
Fuqiang Zhou,Yu Cao,Xinming Wang
A Novel Hardware Solution for Efficient Approximate Fuzzy Image Edge Detection
Fereshteh Behbahani,Mohammad Khaleqi Qaleh Jooq,Mohammad Hossein Moaiyeri,Mostafa Rahimi Azghadi
Hardware Accelerated Scheduling in Real-Time Systems
Luká Kohútka,Martin Vojtko,Tibor Krajcovic
Full Hardware Implementation of FreeRTOS-Based Real-Time Systems
Wakako Nakano,Yukino Shinohara,Nagisa Ishiura
Parallel Hardware Architecture for Medical Image Processing Using Xilinx-System-Generator
Mehdi Baali,Nadjla Bourbia,Kamel Messaoudi,El-Bay Bourennane
Real-time kernel in hardware RTU: a step towards deterministic and high-performance real-time systems
J. Adomat,J. Furunas,L. Lindh,J. Starner
A hardware scheduler for complex real-time systems
S. Saez,J. Vila,A. Crespo,A. Garcia
