I. Introduction
THE bandwidth and density requirements for interconnects within high-performance computing systems are growing fast, owing to increasing chip speeds, wider buses, and larger numbers of processors per system. Some of these trends are highlighted in the most recent update of the International Technology Roadmap for Semiconductors [1] and are summarized in [2]. These trends project that many high-performance chips or modules will be increasingly limited by off-chip or off-module bandwidth. While some relief is expected to come from larger caches and software, there will be an increasing need for technologies that provide improved chip-to-chip or module-to-module interconnections in order to continue the price-performance trends that servers and other high -end systems have shown over the years.