Ultra-low power RFIC design using moderately inverted MOSFETs: an analytical/experimental study

This paper studies the use of moderately inverted MOS transistors in ultra-low power (ULP) RFIC design. We introduce a new figure of merit for a MOS transistor, i.e., the g_mf_T-to-current ratio, (g_mf_T/I_D) which accounts for both the unity-gain frequency and current consumption during the optimization process of the transistor's performance. Using this figure of merit while taking into account the velocity saturation of short-channel MOS devices, it is shown both experimentally and analytically that the g_mf_T/I_D reaches its maximum value in moderate inversion region. Moreover, we analytically investigate the noise behavior of the MOS transistor during the transition from weak inversion to strong inversion region. The measurement results have been obtained for an NMOS transistor fabricated in Jazz Semiconductor's CMOS process

I. Introduction

The ever increasing complexity of wireless communication transceivers makes the power minimization of accompanying RF front-end one of the most important design objectives. In particular, power minimization becomes crucial in emerging technologies such as body implanted sensors, radio frequency identification systems (RFID), and sensor networks, all of which requiring power consumption in microwatt range in order to enable the constituent transceiver to operate either without integrated power supply or at an extremely long battery-life.