A CMOS time-to-digital converter with better than 10 ps single-shot precision

A high-precision CMOS time-to-digital converter IC has been designed. Time interval measurement is based on a counter and two-level interpolation realized with stabilized delay lines. Reference recycling in the delay line improves the integral nonlinearity of the interpolator and enables the use of a low frequency reference clock. Multi-level interpolation reduces the number of delay elements and registers and lowers the power consumption. The load capacitor scaled parallel structure in the delay line permits very high resolution. An INL look-up table reduces the effect of the remaining nonlinearity. The digitizer measures time intervals from 0 to 204 /spl mu/s with 8.1 ps rms single-shot precision. The resolution of 12.2 ps from a 5-MHz external reference clock is divided by means of only 20 delay elements.

I. Introduction

High-Precision time interval measurement systems are commonly used in various special industrial applications. Telecommunications, nuclear science, frequency synthesis, measurement devices such as oscilloscopes and logic analyzers, and pulsed laser time-of-flight measurements, for example, utilize time-to-digital converters (TDCs) or some other form of time interval measurement, and the performance achieved can be critically dependent on the precision of such measurements.