I. Introduction
A SINGLE-ELECTRON transistor (SET) [1] is a promising candidate for ultralow-power and ultrahigh-density circuit systems in the future. In addition, unique features of SETs have been applied to many functional logic circuits [2]–[4]. In order to take full advantage of these unique features in practical circuit applications, a compact and accurate analytical model rather than numerical simulators [5]–[7] is required. Recently, some physically based analytical SET models have been developed for SET circuit simulations with a view to combining with CMOS technology [8]–[12]. However, they do not consider discreteness of the quantum energy levels in the ultrasmall silicon quantum dot of an SET.