A simple approach to optimizing ultra-thin SiON gate dielectrics independently for n- and p-MOSFETs

A technique for optimizing ultra-thin (EOT ~ 1.1-1.3 nm) SiON gate dielectrics independently for n- and p-MOSFETs is demonstrated. Selective nitrogen-enrichment for the nMOS and fluorine incorporation to the pMOS regions were both performed by ion implantation into the Si-substrate with resist masks before gate oxidation. The former provided suppression of gate leakage current and enhancement of drain current to nMOSFETs. The latter improved the NBTI of pMOSFETs without enhancing the B penetration. Moreover, the incorporation of F was found to be a quite useful tool for lowering |V_th| in pMOSFETs. The incorporation of F was shown to bring down pMOS |V_th| by more than 150 mV without any degradation in hole mobility or short channel effect immunity. Since pMOSFETs with N-rich SiON gate dielectrics, as well as high-k pMOS, suffer from excessively high |V_th|, this finding is quite important. In fact, by applying the F-incorporation technique to 65-nm devices, significant I_on enhancement (~8%) was successfully achieved for high I_off conditions. This technique is considered operative also for pMOSFETs with high-k gate dielectrics and/or metal gate electrodes

Introduction

In order to meet the requirements of CMOS scaling, intensive efforts to make Si on gate dielectrics more N-rich have been made [1]–[4]. However, N-rich Si on gate dielectrics have two critical problems. One is the acceleration of NBTI due to the nitrogen in Si on [5]. The other is that of pMOSFETs increases with the concentration of nitrogen as shown in Fig. 1. Since the increase in the nitrogen concentration shifts of pMOSFETs more dramatically than that of nMOSFETs, this phenomenon is understood as caused by the generation of N-related donor-type defects [6]. The situation is thus similar to that of high-k pMOSFETs that suffer from so-called Fermi-pinning effect [7]. Since these problems in using N-rich Si on gate dielectrics are characteristic of pMOS, we demonstrate a technique for selective N-enrichment of Si on in the nMOS region. In addition, fluorine was selectively incorporated into Si on gate dielectrics in the pMOS region to improve NBTI. These compositional modulations were carried out by such a simple method as ion implantation into the Si-substrate before gate oxidation. Fig. 1 Vth of MOSFETs with plasma-nitrided Si on gate dielectrics. N concentration is limited by pMOS Vth, especially for LOP.