A Reduced Switching Frequency Modulation Algorithm for High Power Multilevel Inverters

Multilevel inverters have emerged as the state of the art power conversion systems for high power medium voltage applications. Many topologies and modulation methods are commercially available. This paper presents a new adaptive duty cycle modulation algorithm, that reduces the switching frequency and consequently the switching losses. This can be important for high power applications, where high frequency modulation methods like PWM are not suitable. Results are shown for a nine level asymmetric cascaded inverter. Output voltage waveforms obtained for references with variable frequencies and amplitudes show a similar switching pattern, with a reduced and near constant number of commutations per cycle, regardless the reference frequency and amplitude. The proposed modulation is compared to a multiple carrier PWM method, achieving the same fundamental reference tracking performance with a reduced number of commutations

I. Introduction

Multilevel inverters are considered today the most suitable power converters for high voltage capability and high power quality demanding applications [1]–[4]. Voltage operation above classic semiconductor limits, lower common mode voltages, near sinusoidal outputs together with small 's, are some of the characteristics that have made this power converters popular for industry and research, specially for medium-voltage applications.