Finite impulse response filter banks realized using switched capacitor technique

In this paper we present a conception of the finite impulse response (FIR) filter banks realized using the switched-capacitor (SC) rotator architecture. The illustrative filter bank has been designed and fabricated in the CMOS 0.35 /spl mu/m technology. Its main advantage is simplicity, as only few modifications of the initially designed single filter had been necessary in order to realize a QMF filter bank. These modifications changed neither the area of the filter layout nor its power consumption. The designed chip can operate in two modes easy to switch between them: a single filter with the programmable frequency response mode and a filter bank mode. Realization of these two modes in the same circuit has been possible, because switching between them encompasses merely the digital part of the control system and a subset of the clock signals.

1 Introduction

Filter banks are widely used in multirate systems, subband coding (SBC) schemes, wavelet transformers, scalable coders, and in many other applications. Filter banks are composed of at least two complementary filters: a low-pass and a highpass filter, but systems with many filters are also common. Filtering tasks are typically realized with digital signal processors (DSP's) or with field programmable gate arrays (FPGA's) but they can also be performed with discrete-time analog circuits if the required dynamic range is moderate. Figure 1. Wavelet transformer as binary tree-structured QMF filter bank