Abstract:
Shallow p+-n junctions on the order of 0.1-µm deep have been fabricated using boron-nitride (BN) solid diffusion sources. The process combines the hydrogen-injection meth...Show MoreMetadata
Abstract:
Shallow p+-n junctions on the order of 0.1-µm deep have been fabricated using boron-nitride (BN) solid diffusion sources. The process combines the hydrogen-injection method and rapid thermal processing (RTP). Sheet resistivities, in ranges from 50 to 130 Ω/sq with junction depths from 0.1 to 0.19 µm, are possible in this technique. Diode characteristics of 0.11-µm junctions show low reverse leakage current, of the order of 10 nA/cm2, indicating the possibility of this method to form PMOS source-drain contacts.
Published in: IEEE Electron Device Letters ( Volume: 8, Issue: 12, December 1987)
References is not available for this document.
Select All
1.
T. E. Seidel, "Rapid thermal annealing of BF+2implanted pre-amorphized silicon", IEEE Electron Device Lett., vol. EDL-4, pp. 353-355, 1983.
2.
H. Mikoshiba and H. Abiko, "Junction depth versus sheet resistivity in BF+2-implanted rapid-thermal-annealed silicon", IEEE Election Device Lett., vol. EDL-7, pp. 190-192, 1986.
3.
D. E. Davies, "1-2-keV boron implants into silicon", IEEE Electron Device Lett., vol. EDL-6, pp. 397-399, 1985.
4.
D. L. Kwong, D. C. Meyers and N. S. Alvi, "Simultaneous formation of silicide ohmic contacts and shallow p+-n junctions by ion-beam mixing and rapid thermal annealing", IEEE Electron Device Lett., vol. EDL-6, pp. 244-246, 1985.
5.
E. Nagasawa, H. Okabayashi and M. Morimoto, "Mo- and Ti-silicided low-resistance shallow junctions formed using the ion implantation through metal technique", IEEE Trans. Electron Devices, vol. ED-34, pp. 581-586, 1987.
6.
P. G. Carey, T. W. Sigmon, R. L. Press and T. S. Fahlen, "Ultra-shallow high-concentration boron profiles for CMOS processing", IEEE Electron Device Lett., vol. EDL-6, pp. 291-293, 1985.
7.
E. Ling, P. D. Maguire, H. S. Gamble and B. M. Armstrong, "Very-shallow low-resistivity p+-n junctions for CMOS technology", IEEE Electron Device Lett., vol. EDL-8, pp. 96-97, 1987.
8.
N. H. Ditrick and M. S. Bae, "An improved boron nitride glass transfer process", Solid State Technol., vol. 23, no. 7, pp. 69-73, 1980.
9.
"ASTM 850 Amer. Soc. Testing and Materials", The effect of Si-SiO interface on the excess point defect distribution in silicon, 1984.
10.
R. B. Fair, "Boron diffusion in silicon-concentration and orientation dependence background effects and profile estimation", J. Electrochem. Soc., vol. 122, pp. 800-805, 1975.
