A stepwise constant conductance approach for simulating resonant tunneling diodes

Current CMOS technology is reaching its scaling limits and thus the CMOS based devices are slowly being replaced by new nanotechnology devices. These nanotechnology devices, however, pose some simulation challenges due to their non-monotonic I-V characteristics and uncertain properties which lead to the negative differential resistance (NDR) problem and the chaotic performance of the simulator. This paper proposes a new circuit simulation approach that can effectively simulate nanotechnology devices, avoiding such problems. The experimental results show a 20-30 times speedup comparing with existing simulators.

I. Introduction

New nanotechnology devices such as resonant tunneling diodes (RTD), resonant tunneling transistors (RTT) and carbon nanotubes (CNT) are being widely explored as next generation logic devices. This is due to the increasing circuit complexities and scaling limits of the CMOS devices. Further, these nanoelectronic devices offer many benefits such as high packaging density and fairly simple implementation of Boolean functions. The functions such as AND, OR, NAND, NOR and NOT can be implemented with a single pair of resonant tunneling devices [10]. Although these devices offer such advantages, they, unlike the existing CMOS devices, exhibit non-monotonic I-V characteristics consisting of multiple peaks and valleys and this poses serious challenges for the modeling and simulation of these devices.