Programming analog computational memory elements to 0.2% accuracy over 3.5 decades using a predictive method

This paper describes a new predictive algorithm that can be used for programming large arrays of analog computational memory elements within 0.2% of accuracy for 3.5 decades of currents. The average number of pulses required are 7-8 (20 /spl mu/s each). This algorithm uses hot-electron injection for accurate programming and Fowler-Nordheim tunneling for global erase. This algorithm has been tested for programming 1024/spl times/16 and 96/spl times/16 floating-gate arrays in 0.25 /spl mu/m and 0.5 /spl mu/m N-well CMOS processes, respectively.

I. Existing Programming Schemes

Floating gates have been used as computational and memory elements in various applications like adaptive circuits [1], mass storage [2], data converters [3], imagers [4], etc. They have been used to store digital information for long periods in structures such as EPROMs, EEPROMs, and flash memories. Floating gates can retain analog data for long periods and reported retention accuracy is about 6 bits for 15 years at more than 125^◊C [1].