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Large-scale photonic integrated circuits | IEEE Journals & Magazine | IEEE Xplore

Large-scale photonic integrated circuits


Abstract:

100-Gb/s dense wavelength division multiplexed (DWDM) transmitter and receiver photonic integrated circuits (PICs) are demonstrated. The transmitter is realized through t...Show More

Abstract:

100-Gb/s dense wavelength division multiplexed (DWDM) transmitter and receiver photonic integrated circuits (PICs) are demonstrated. The transmitter is realized through the integration of over 50 discrete functions onto a single monolithic InP chip. The resultant DWDM PICs are capable of simultaneously transmitting and receiving ten wavelengths at 10 Gb/s on a DWDM wavelength grid. Optical system performance results across a representative DWDM long-haul link are presented for a next-generation optical transport system using these large-scale PICs. The large-scale PIC enables significant reductions in cost, packaging complexity, size, fiber coupling, and power consumption.
Published in: IEEE Journal of Selected Topics in Quantum Electronics ( Volume: 11, Issue: 1, Jan.-Feb. 2005)
Page(s): 50 - 65
Date of Publication: 28 February 2005

ISSN Information:


I. Introduction

The EXPLOSIVE “Moore's Law” growth of integrated electronics [1], along with the similarly explosive growth of the Internet, has contributed to growing demand for communications networks offering greater bandwidth and flexibility at lower cost. Monolithic InP-based photonic integrated circuits (PICs), if able to provide sufficient functionality, performance, and cost reduction, offer compelling solutions for such networks, while also providing the same inherent scalability that has benefited Si-based integrated electronics. However, since the early proposals for photonic integration [2]–[5], progress in InP PIC technology has been relatively slow. Today, large-scale PICs (LS-PICs) with high levels of integration (50 components/chip) remain confined to the laboratory. There are myriad reasons for this slow rate of maturity. Numerous technological barriers associated with InP semiconductor processing have been one of the strongest inhibitors—including difficulty in achieving the requisite process uniformity and reproducibility—on a manufacturing scale—in such processes as epitaxy, lithography, dry etching, etc. Additionally, monolithically integrating numerous devices and functions, while at the same time minimizing process complexity, has proven challenging from a design standpoint, due to requirements associated with active/active and active/passive transitions, electrical and optical isolation, compromises in discrete device performance, etc. As a result, early versions of LS-PICs, even if successful in demonstrating useful functionality, have fallen short in demonstrating the levels of performance and manufacturability necessary to achieve commercial viability. It is also interesting to note that “industry pull” may have played a role in this slow development path, particularly in the past 10 years. Since all-optical wavelength division multiplexing (WDM) networks based on Erbium doped fiber amplifier (EDFA) technology rose to prominence in the 1990s, meeting the demands of telecommunications bandwidth while in effect circumventing the need for optical-electronic-optical (OEO) conversion, the motivation for commercial development of large scale photonic integration that would enable such approaches was somewhat dampened.

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