I. Introduction
With THE deployment of 40 Gb/s time-division multiplexing (TDM)-based fiber IC chipsets underway, improvements in transistor design and performance are being pursued for the development of systems operating at 160 Gb/s and higher. To realize such systems, the heterojunction bipolar transistor (HBT) specifications require an and greater than 440 GHz, a breakdown voltage exceeding 3 V, operating current density greater than 10 at , and low base–collector capacitance [1]. These HBTs would also permit microwave analog-to-digital converters (ADC) of increased bandwidth. Improving a transistor so that all digital circuits making use of it become faster involves proportionally, reducing all capacitances and transit times, while keeping constant the device , , and parasitic resistances (, ). This can be accomplished by a combination of a thinner collector, narrower emitter and collector junctions, lower specific contact resistances, and increased operating current density [2].