Delay fault diagnosis using timing information

In modern technologies, process variations can be quite substantial, often causing design timing failures. It is essential that those errors be correctly and quickly diagnosed. Unfortunately, the resolution of the existing delay-fault diagnostic methodologies is still unsatisfactory. In this paper, we investigate the feasibility of using the circuit timing-information to guide the delay-fault diagnosis. We propose a novel and efficient diagnostic approach based on the timing window propagation (TWP) to achieve significantly better diagnostic results than those of an existing delay-fault diagnostic commercial tool. Besides locating the source of the timing errors, for each identified candidate our method determines the most probable delay defect size. The experimental results indicate that the new method diagnoses timing faults with very good resolution.

1. Introduction

Due to process-parameters variations, a circuit may fail to operate at the desired clock speed. A critical task for a failure analyzer is to locate quickly and accurately the cause of timing failures. The quality of failure analyzer is measured by their resolution, which is defined as a ratio of the number of true faults to the total number of reported candidates. Unfortunately, the existing delay fault-diagnostic methodologies suffer from very poor resolution. Industrial data suggest that on average, it may take about 240 hours to locate an open via defect by screening under the microscope the failure candidates reported by diagnostic tool. If too many candidates are reported by the diagnostic tool, the time-to-market requirement is hard to satisfy.