I. Introduction
The replacement damascene metal gate CMOS technology has the advantages of eliminating polysilicon depletion, providing adjustable work functions from the gate electrode, scalable to sub-65 nm technologies, and comparable to high-k gate dielectrics without high temperature processing steps. In the past, PVD TiN/CVD W stacked gate MOSFETs have been reported [1], [2]. There are publications for TaN as NMOSFETs gate electrodes [3]. These publications focus primarily on the traditional way of MOSFET fabrication—both the gate dielectrics and metal electrodes have to go through difficult dry etching and very high temperature anneals for activation of source/drain implants, causing reliability concerns. In this letter we describe replacement metal gate pMOSFETs [4] fabricated with PVD Ni/TaN and Co/TaN as stacked electrode.
Fabrication of replacement (Damascene) metal-gate pMOSFETs.