I. Introduction
Low-Index contrast silica bench technology—referred to as planar lightwave circuit (PLC) or silicon optical bench (SiOB)—has gained widespread use in practice in the fabrication of passive integrated optical components by virtue of its use of well-tested integrated-circuit industry manufacturing processes and technology [1]. Large silica waveguide cross sections offer low fiber-to-chip coupling and propagation losses. A major drawback of SiOB technology is the relatively large component size, where a critical factor is the minimum waveguide bend radius. This radius is large—normally in the millimeters—in the low-index contrasts − found in silica [1]. The low density of integration keeps production cost high and invites yield problems. On the other hand, high-index contrast, such as silicon-on-insulator (SOI)—while offering dense integration, poses challenges of fiber-to-chip insertion loss due to mode shape mismatch and misalignment, scattering loss, and sensitivity to other fabrication defects and tolerances, as well as fabrication processing challenges.