I. Introduction
Recently, planar active electronically scanned array (AESA) based on silicon chips have been developed at a very fast pace. The cost of phased array deployment has been reduced by a large extent due to the advancement in silicon technology and multi-layer PCB manufacturing. This is especially true in the satellite industry, where companies such as Starlink, OneWeb and Amazon Kuiper have invested billions of dollars to establish their LEO constellations to provide internet service to users.