A Comparative Analysis of MDSC-Based Phasor Estimation Technique for Digital Relays in Power System Protection

Decaying DC offset frequently emerges as a major issue in power systems, especially under fault conditions. This leads to a distortion in the current waveform associated with the fault, which could significantly challenge protective and control mechanisms, possibly leading to their malfunction or breakdown. These decaying DC components (DDCs) complicate the extraction of critical parameters such as the current magnitude and phase angle of the fundamental frequency component from fault signals, which is crucial for the accurate operation of protective relays. Discrete Fourier Transform (DFT)-based algorithms are frequently used for phasor estimation, but their accuracy suffers when confronted with decaying DC components (DDCs) in power system fault currents. The low sampling rate further exacerbates the inaccuracy of DFT-based estimations, leading to inaccurate fault detection by protective relays. This paper comprehensively reviews three innovative methods that leverage the Multiple Delayed Signal Cancellation (MDSC) filter to overcome these limitations. The MDSC-based phasor estimation effectively attenuates the DDC component, enabling precise and rapid phasor estimation, benefiting from its higher sampling rate, and enhancing accuracy in relaying applications. The theoretical foundations of each method are analyzed, with an emphasis on their unique advantages and potential applications in digital relaying and power system protection. This review provides valuable insights into the latest advancements in DDC elimination, offering a pathway to more reliable and efficient fault analysis in power systems. Numerical and simulation tests unequivocally demonstrated the effectiveness of the proposed approach by showcasing its superior performance compared to four other phasor estimation methods. The proposed methods demonstrated exceptional performance in conditions plagued by multiple DDCs, harmonics, noise, and off-nominal frequencies, achieving fast and precise phasor estimation.

Nomenclature

AbbreviationExpansion

Acronyms
AC	Alternating current.
CharmDF	Characteristic harmonic digital filter.
CT	Current transformer.
CF	Cosine based filter.
DC	Direct Current.
DDC	Decaying DC.
DFT	Discrete Fourier transform.
FCDFT	Full cycle discrete Fourier transform.
HCMDSC	Half cycle Multiple delayed signal cancellation.
LES	Least square estimation.
MDSC	Multiple delayed signal cancellation.
cMDSC	cosine-Multiple delayed signal cancellation.
sMDSC	sine-Multiple delayed signal cancellation.
MDFT	Modified discrete Fourier transform.
PMU	Phasor measurement units.
Symbols
$I_{DFT}$	FCDFT phasor consists of both AC and DDC components.
$I_{\mathrm {MDSC}}(n)$	FCMDSC phasor consists of both AC and DDC components.
HCMDSC	Half cycle MDSC filter with first two half cycles ($I_{\mathrm {HCMDSC_{a}}}(n)$ , $I_{\mathrm {HCMDSC_{b}}}(n)$ ).
HCMDSC	Half cycle MDSC filter with second two half cycles ($I_{\mathrm {HCMDSC_{c}}}(n)$ , $I_{\mathrm {HCMDSC_{d}}}(n)$ ).
$i(n)$	Input current signal.
$y(n)$	High frequency modulated signal $(-1)^{l}$ .
$z(n)$	High frequency modulated signal with down-sampling $\frac {1+(-1)^{l}}{2}$ .
$E^{-N/m}$	$e^{\frac {-T_{s}}{\tau }}$ exponentially decaying term.
$I_{MDSC}^{ddc}(n)$	Estimated DDC using MDSC filter.
$I_{{MDSC}_{1}}(n)$	Fundamental phasor estimated from MDSC filter ($I_{MDSC}(n)-I_{MDSC}^{ddc}(n)$ ).
$f, f_{s}, m, N$	Fundamental frequency in hertz, sampling frequency in hertz, delay factor, and the number of samples per cycle.
$I_{0}, \Delta t, \tau$ ,	Amplitude of DDC, time interval, and time constant, respectively.
$I, \omega, \theta$	Actual values of amplitude, angular frequency, and phase angle ($\omega t + \phi$ ) of the input signal.

SECTION I. Introduction

In the realm of power system protection, a protective relay is essential. Its primary function is to identify faults within electrical power systems, including transmission lines, distribution networks, and equipment, and to trigger the circuit breaker to isolate the faulty section from the rest of the system. The key attributes that define an excellent protective relay are selectivity, sensitivity, quick response, reliability, straightforward design, and affordability. Power system protection aims to quickly eliminate faults to prevent damage to equipment like motors and generators. For precise fault detection in transmission lines, protective relays integrate a PMU [1], [2]. However, the fault current may include several DDC components, such as primary DDC and secondary DDC, which are caused by the Current Transformer (CT), with the primary DDC being significantly more intense. Therefore, in numerical relays [3], the central issue is the phasor estimation error caused by the primary DDC. The literature suggests multiple strategies to eliminate the influence of the DCC component on phasor estimation [4], [5], [6], [7], [8], [9], [10], [11]. The analysis in [12] focuses on both odd and even sample sets, utilizing the discrepancy between these sets to eliminate the inaccuracy introduced by DDC component. An inherent limitation was the subtraction process, which necessitated the inclusion of an additional low-pass filter when noise was present. In [13], the DDC component is eliminated by implementing a mimic filter, followed by utilizing the discrete Fourier transform (DFT) to compute the fundamental phasor. The primary limitation of this strategy was its inability to handle time-constant variations. In the field of literature [14], it was proposed that using a notch filter can facilitate the integration of multiple DDCs into a single combined DDC, thereby minimizing error rates. However, a notable disadvantage of this method was its vulnerability to noise interference. Studies [15] and [16] introduce the application of empirical mode decomposition and intrinsic time-scale decomposition as strategies to filter out DDCs, but these techniques were criticized for their high computational demands. Further, research in [17] and [18] described the identification of DDCs through mathematical operations and the amalgamation of signals over two successive cycles. In [19], the precise fundamental phasors were extracted by combining the real and imaginary components of the DFT filter. However, these methods were susceptible to errors when odd harmonics were present in the fault signal. To mitigate the DDCs, a digital filter known as the typical harmonic digital filter (CharmDF) was proposed [20]. The estimated phasor obtained using the CharmDF approach exhibited an oscillation error due to the insufficient filtering of DDCs. An alternative approach to removing DDC offset was the application of adaptive wavelet transform. The wavelet transform was a mathematical technique that could break down a signal into its many frequency components, as demonstrated in [21]. This approach exhibited excellent performance in noisy environments and was not affected by DDC’s range of time constants. Nevertheless, it necessitated greater computing complexity compared to the DFT technique.

The study [22] introduced a least squares (LES) technique to remove the DDC offset. This approach exhibited sub-optimal performance in the presence of a tiny time constant. The technique suggested in [23], which was based on partial sums, was effective for estimating a single DDC. However, its effectiveness deteriorated when there were two or more DDCs present. The Prony method in [24] used a model to estimate the parameters of an exponential signal model based on the observed signal. The Prony method was resistant to DDCs and performed effectively in noisy environments. However, it involved a greater processing burden than the Discrete Fourier Transform (DFT) methodology. The approach suggested in [25] utilized a cosine filter and performed superiorly to traditional DFT filters. However, it had a relatively limited ability to reject errors and experienced a time delay of one-fourth of a cycle. The Kalman filter estimated phasors, as suggested in [26]. The techniques described in [27], [28], [29], [30], and [31] were not resistant to even harmonics.

In summary, the algorithms above are unable to satisfy the following requirements concurrently: (1) robust immunity to decaying DC (DDC) components across a broad range of time constants, (2) high resilience against noise interference, (3) poor performance in off-nominal frequency conditions and (4) minimal computational overhead (5) low sampling rate. To reduce the computational load when determining the fundamental phasor, most of the discussed methods utilize the DFT algorithm at a lower sampling rate (16 or 32 samples per cycle). The fundamental phasor obtained with a low sampling frequency is less precise when compared to the fundamental phasor calculated with a high sampling rate [32]. Hence, for the relay to precisely and dependably estimate the fundamental phasor, a signal with a high sampling rate is necessary. To acquire accurate estimations of the fundamental phasor, this study proposes a method called Multiple Delayed Signal Cancellation (MDSC) [33], [34]. The Multiple Delayed Signal Cancellation (MDSC) method, originally applied in grid synchronization, provides superior harmonic rejection and grid synchronization compared to conventional Phase lock Loop (PLL) methods. MDSC filters offer more flexibility in configuring the lowest undesired harmonics. This allows for better customization based on the specific harmonics present in the grid voltage when compared to the CDSC filters [34], [35], [36]. Unlike Synchronous reference frame (SRF-PLL), Multiple Complex Coefficient filter PLL (MCCF-PLL), and second-order generalized integrator PLL (SOGI-PLL), MDSC-PLL maintains robust performance even in distorted or unbalanced grids.

The MDSC method, with its inherent ability to leverage higher sampling rates, offers a significant advantage in power system protection. MDSC enhances the speed and precision of fault detection and identification by accurately capturing and analyzing high-frequency components in fault currents. This leads to faster response time, minimizing damage to equipment and improving overall system stability. Furthermore, the rich data acquired through higher sampling rates enables more advanced signal processing techniques, such as precise filtering and harmonic analysis, allowing the relay to differentiate between faults and non-fault events like inrush currents effectively. While the increased data volume may pose communication and storage challenges, these can be mitigated through optimized data transmission protocols, efficient compression techniques, and scalable storage solutions as given in [37] and [38]. Although higher sampling rates may lead to increased costs for communication and storage, the advantages in terms of enhanced system reliability, safety, and long-term viability often justify the investment. Conducting a thorough cost-benefit analysis can assist in making well-informed decisions.

By leveraging a high sampling rate and minimal computing burden, This method offers three different solutions for estimating the DDC components.

A. Proposed Method (a): High-Frequency Modulation Technique Using MDSC Filter

A fault current signal and an auxiliary signal utilizing high-frequency modulation are introduced to enhance the precision of phasor measurement and eliminate the DDC component. Following that, the DDC component is calculated and eliminated from the original fault signal.

B. Proposed Method (b): Down Sampling High-Frequency Modulation Technique Using MDSC Filter

To enhance phasor measurement accuracy and eliminate the DDC component, a fault current signal and an auxiliary signal employing high-frequency modulation in a down-sampling approach are introduced. Subsequently, the DDC offset is computed and removed from the original fault signal.

C. Proposed Method (c): Four Half Cycle Based Algorithm Using MDSC Filter

This method presents a phasor estimation algorithm that leverages the half-cycle MDSC (HCMDSC). By calculating four HCMDSC results from two consecutive half-cycle sample sets, utilizing both the standard basis vector and its complex conjugate, the algorithm accurately estimates and compensates for the error introduced by the DDC component. The estimated DDC offset is finally eliminated from the original signal.

To validate the proposed methods (a), (b), and (c), computer-based and simulation tests in IEEE 9-bus systems are conducted, and their performance is compared with four related methods. The test findings indicate that the proposed methods (a), (b), and (c) have the potential to rapidly and accurately estimate the phasor, even when there are multiple DDCs and interference from harmonics and noise. All the proposed methods show better performance than the existing four DFT-based methods. Finally, among the three proposed methods, method (c) exhibited the most favorable performance.

The subsequent sections of this work are organized as follows: Section II presents techniques for estimating phasors using DFT and MDSC methods. Section III showcases the experimental and simulated results of the proposed method. Section IV explores real-time simulations of the IEEE 9-bus system. Finally, Section V provides concluding remarks.

SECTION II. Phasor Estimation Methods

A. Conventional DFT Method

The Discrete Fourier Transform (DFT) approach is extensively utilized in digital relays and phasor measurement units (PMUs) to accurately estimate the fundamental phasor of a current or voltage output. Typically, when a problem occurs in a transmission line, the current signals consist of a fundamental frequency and DDCs, which must be removed to ensure accurate power system relay operation.

In this research, the traditional algorithm based on Discrete Fourier Transform (DFT) is formulated, considering a signal composed of a fundamental sinusoid along with harmonics and DDC processes for analytical purposes. The fault current signal is represented by the discretization form as follows: $$\begin{align*} i(n)& =\sum _{h=1}^{N/2-1}I_{h} \cos \left ({{\frac {2 \pi h}{N}n+\phi _{h}}}\right) +I_{0} e^{-\frac {n \Delta {t}}{\tau }} \\ & = i_{ac}(n)+i_{ddc}(n), \tag {1}\end{align*}$$ where $\tau$ and $I_{0}$ represent the time constant and magnitude of the DDC term, respectively. N symbolizes the total number of samples taken throughout each cycle, whereas $\Delta {t}$ represents the time interval between each sample. The $i_{ac}(n)$ variable encompasses all alternating current (AC) elements, including the fundamental and harmonic components. The DDC component is referred to as $i_{ddc}(n)$ . A low-pass filter effectively removes harmonic frequencies that are higher than $(N/2 - 1)$ , preventing aliasing. The phasor $I_{DFT}$ can be expressed using the Full-Cycle Discrete Fourier Transform (FCDFT) as follows: $$\begin{equation*} {I_{DFT}}=\frac {2}{N} \sum _{n=0}^{N-1} i[n] e^{-j \frac {2 \pi }{N} n}=I_{DFT}^{ac}+I_{DFT}^{ddc}, \tag {2}\end{equation*}$$ where $I_{DFT}^{ac}=I_{1} e^{j \theta _{1}}$ , $I_{DFT}^{ddc}=\frac {2}{N} I_{0}\frac {\left ({{1-E^{N}}}\right)}{1-E e^{-j \frac {2 \pi }{N}}}$ , and $E = e^{\frac {-\Delta t}{\tau }}$ .

The FCDFT offers the benefit of easy implementation and provides the most accurate estimation when periodicity conditions are met. Nevertheless, if there is a single DDC or multiple DDCs $I_{DFT}^{ddc}$ , or if any of the sinusoidal signal components, such as amplitude, frequency, or phase, is not constant, this technique has notable limitations. Furthermore, phasor estimation accuracy using a low sampling frequency is inferior to that achieved with a high sampling rate [32]. Therefore, to ensure the relay’s ability to precisely and reliably estimate the fundamental phasor, a signal characterized by a high sampling rate is essential. The next subsection introduces a high sample rate strategy utilizing MDSC for fundamental phasor estimation to overcome the drawbacks of the standard FCDFT method.

B. Multiple Delayed Signal Cancellation Method

1) MDSC Operator in Continuous-Time

Consider a distorted single-phase grid voltage signal $v(t)$ containing $(m-1)$ harmonics $v_{h}(t)$ including the dc offset. Mathematically, it can be expressed as $$\begin{equation*} v(t) = \sum _{h=0}^{m-1} v_{h}(t) = \sum _{h=0}^{m-1} V_{h} \sin (\theta _{h}), \tag {3}\end{equation*}$$ where the instantaneous phase angle $\theta _{h} = h \omega t+\phi _{h}, \omega = 2 \pi f$ is the grid fundamental angular frequency in rad/s, $f = 1/T$ is the fundamental frequency in Hz, T is the fundamental time-period of the signal, $\phi _{h}$ is the initial phase angle at harmonic order h, and $V_{h}$ is the amplitude at harmonic order h.

The MDSC operators for a single-phase grid voltage signal can be treated as a generalization of the so-called MDSC operator defined in [39]. When a three-phase grid voltage space-phasor $\vec {v}_{abc}(t)$ is transformed into $\alpha \beta$ -frame space-phasor $\vec {v}_{\alpha \beta }(t)$ [40], the $\alpha \beta$ -frame MDSC operation applied on the $\alpha \beta$ -frame space phasor is by $$\begin{equation*} \alpha \beta \text { MDSC}[\vec {v}_{\alpha \beta }(t)] = \frac {1}{m} \sum _{l=0}^{m-1} \vec {v}_{\alpha \beta }\left ({{ t - \frac {Tl}{m} }}\right) e^{j\frac {2\pi l}{m}}, \tag {4}\end{equation*}$$ where, $e^{\pm j \frac {2 \pi l}{m}}$ is called the twiddle factor.

By expressing the above equation in real numbers, the twiddle factor will be decomposed into real and imaginary components as $$\begin{equation*} e^{\pm j \frac {2 \pi l}{m}} = \cos \frac {2 \pi l}{m} \pm j \sin \frac {2 \pi l}{m}. \tag {5}\end{equation*}$$

When these real and imaginary components are used independently, this MDSC operation can be applied to a single-phase signal. In particular,

1. When the real component is utilized, the MDSC operation can extract the fundamental frequency in-phase component of the signal while eliminating $(m-1)$ number of harmonics at a time in the signal. This operation is named as cosine-MDSC (cMDSC) operation. That is, $$\begin{align*} \text { cMDSC}^{1}_{m}[v(t)]& =\frac {2}{m}\sum \limits _{l=0}^{m-1}v\left ({{t-\frac {Tl}{m}}}\right)\cos \left ({{\frac {2\pi l}{m}}}\right) \\ & =v_{1}(t). \tag {6}\end{align*}$$

2. When the imaginary component is considered, the MDSC operation can extract the fundamental frequency quadrature component of the signal while eliminating $(m-1)$ number of harmonics at a time in the signal. This operation is named as sine-MDSC (sMDSC) operation. That is, $$\begin{align*} \text { sMDSC}^{1}_{m}[v(t)]& =\frac {2}{m}\sum \limits _{l=0}^{m-1}v\left ({{t-\frac {Tl}{m}}}\right)\cos \left ({{\frac {2\pi l}{m}}}\right) \\ & =qv_{1}(t). \tag {7}\end{align*}$$

2) MDSC Operator in Discrete-Time

Let the sampling frequency be $f_{s} = 1/T_{s}$ , where $T_{s}$ is the sampling period, and $N = \frac {f_{s}}{f}$ is the total number of samples in a fundamental period of the signal $v(t)$ . Let the continuous-time be represented in a discrete sample points as $t = n\Delta t$ . The above continuous-time cMDSC operator and sMSDC operator can be expressed in the discrete-time domain, respectively, as follows: $$\begin{align*} cMDSC_{m}^{1} [v(n)] & = \frac {2}{m} \sum _{l=0}^{m-1} v\left ({{n-\frac {Nl}{m}}}\right) \cos \left ({{\frac {2 \pi l}{m}}}\right) \tag {8}\\ sMDSC_{m}^{1} [v(n)] & = \frac {2}{m} \sum _{l=0}^{m-1} v\left ({{n-\frac {Nl}{m}}}\right) \sin \left ({{\frac {2 \pi l}{m}}}\right) \tag {9}\end{align*}$$

The choice of the delay factor m in cMDSC and sMDSC operations is crucial, as it distinguishes these operations from others. Theoretically, m can be any integer between 3 and N. When $m = 3$ , cMDSC and sMDSC operations remove all harmonics that are multiples of 3. Conversely, when $m = N$ , the delay value $\frac {N}{m}$ corresponds to the unit sample delay. In this case, the recursive cMDSC and sMDSC operations become equivalent to Sliding DFT (SDFT) operations [41], [42] which can extract in-phase and quadrature components of a single-phase input signal. However, selecting a delay factor m much smaller than N is possible. This flexibility results in cMDSC and sMDSC operations having shorter delay times compared to those provided by the SDFT operator.

If $N/m=k$ is an integer, the expression of (8) and (9) can also be re-written as follows: $$\begin{align*} cMDSC_{m}^{1} [v(n)] & = \frac {2}{m} \sum _{l=0}^{m-1} v\left ({{n-kl}}\right) \cos \left ({{\frac {2 \pi l}{m}}}\right) \tag {10}\\ sMDSC_{m}^{1} [v(n)] & = \frac {2}{m} \sum _{l=0}^{m-1} v\left ({{n-kl}}\right) \sin \left ({{\frac {2 \pi l}{m}}}\right) \tag {11}\end{align*}$$

In fact, the signal $v(n-kl)$ in (10) and (11) can be seen as the result of down-sampling the original signal by a factor of k, effectively reducing the sampling rate from $f_{s}$ to $\frac {f_{s}}{k}$ . This process, known as decimation [43], involves discarding some of samples from the original signal periodically. As a result, decimation reduces the computational resources needed for real-time digital processing, both in hardware and software.

Now define $\bar {v}(n)$ be the output signal after this decimation operation as follows: $$\begin{equation*} \bar {v}(n) = \mathrm {Dec}_{m} v(n). \tag {12}\end{equation*}$$ Thus, the MDSC operation as shown in (10) and (11) can also be expressed as: $$\begin{align*} cMDSC_{m}^{1} [v(n)] & = \frac {2}{m} \sum _{l=0}^{m-1} \bar {v}\left ({{n-l}}\right) \cos \left ({{\frac {2 \pi l}{m}}}\right) \tag {13}\\ sMDSC_{m}^{1} [v(n)] & = \frac {2}{m} \sum _{l=0}^{m-1} \bar {v}\left ({{n-l}}\right) \sin \left ({{\frac {2 \pi l}{m}}}\right) \tag {14}\end{align*}$$

It can be concluded that these expressions shown in (13) and (14) are essentially equivalent to conventional DFT operations applied to $\bar {v}(k)$ . That is, $$\begin{equation*} \text { MDSC}_{m}^{-1} [v(n)] = DFT^{-1} [\bar {v}(n)]. \tag {15}\end{equation*}$$ The direct-form realization of these operations is illustrated in Fig. 1.

FIGURE 1.

Block diagram of MDSC: Direct form.

3) Recursive Realizations of MDSC Operators for Phasor Extractions

By applying z-transform, the transfer function of cMDSC and sMDSC operations can be obtained as follows: $$\begin{align*} H_{c}(z) & = \frac {2}{m}\frac {[1-z^{-N}][1-\cos (2\pi /m)z^{-N/m}]}{1-2\cos (2\pi /m)z^{-N/m}+z^{-2N/m}} \tag {16}\\ H_{s}(z) & = \frac {2}{m}\frac {[1-z^{-N}]\sin (2\pi /m)z^{-N/m}}{1-2\cos (2\pi /m)z^{-N/m}+z^{-2N/m}}. \tag {17}\end{align*}$$ Since $$\begin{align*} \text { cMDSC}_{m}^{1} [v(n)] & = v_{1}(n) = V_{1}\sin \left ({{\frac {2 \pi }{N}n + \phi _{1}}}\right) \\ \text {sMDSC}_{m}^{1} [v(n)] & = qv_{1}(t) = V_{1}\cos \left ({{\frac {2 \pi }{N}n + \phi _{1}}}\right),\end{align*}$$ as shown in (6) and (7), the phasor $V_{1}\langle {\phi _{1}}$ at the fundamental frequency $\omega$ can be obtained by the following equations: $$\begin{align*} V_{1} & = \left ({{ \left |{{ \text {cMDSC}_{m}^{1} [v(n)] }}\right |^{2} + \left |{{ \text {sMDSC}_{m}^{1} [v(n)] }}\right |^{2} }}\right)^{1/2}, \tag {18}\\ \phi _{1} & = \arctan \frac {\text {sMDSC}_{m}^{1} [v(n) ] }{\text {cMDSC}_{m}^{1} [v(n) ] } -2\pi \frac {n}{N}. \tag {19}\end{align*}$$

By combining (16), (17) and (18), (19), the phasor extractor of the fundamental frequency $\omega$ realized by recursive forms of the MDSC operator can be obtained as shown in Fig. 2.

FIGURE 2.

Block diagram of MDSC: Recursive form.

In the next step, by utilizing the above theory, the combination of cMDSC and sMDSC is obtained in (20), for the phasor estimation. Initially, the MDSC filter will be implemented to calculate the AC section and DDC component of the full-cycle MDSC (FCMDSC). Subsequently, the fundamental phasor will be obtained. The MDSC operation on the fault signal, including the AC component and the DDC part, can be stated like the usual DFT technique [44], [45]. $$\begin{align*} I_{\mathrm {MDSC}}(n)& = \frac {2}{m} \sum _{l=0}^{m-1} i\left ({{n-\frac {N l}{m}}}\right) e^{-j \frac {2 \pi l}{m}} \\[-2pt] & = I_{\text {MDSC}}^{\text {ac}}(n)+I_{\text {MDSC}}^{\text {ddc}}(n), \tag {20}\end{align*}$$

The function MDSC is defined as the absolute value of $I_{1}$ multiplied by the complex exponential $e^{j \theta _{1}}$ , $I_{\text {MDSC}}^{\text {ac}}(n)=\left |{{I_{1}}}\right | e^{j \theta _{1}}$ , represents the actual fundamental phasor. The variables m and N are integers representing the number of delayed signals and the number of samples in one fundamental cycle. The Bode plots for an MDSC (Multiple Delayed Signal Cancellation) filter, shown in Fig. 3, Fig. 4, Fig. 5 and Fig. 6, demonstrates that the proposed method can effectively eliminate all the harmonics other than m $\pm ~1$ harmonics along with fundamental frequency, by employing variable delay factor $(m)$ . In the examples, harmonics were successfully removed using delay factors of m=14 and m=16. The choice of delay factor can be tailored to the specific harmonics targeted for elimination.

FIGURE 3.

Bode plot for cMDSC when m=14.

FIGURE 4.

Bode plot for sMDSC when m=14.

FIGURE 5.

Bode plot for cMDSC when m=16.

FIGURE 6.

Bode plot for sMDSC when m=16.

The DFT technique (2) and MDSC method (20) differ in their usage of delayed signals. The DFT method does not utilize delayed signals, whereas the MDSC approach relies on delayed signals to estimate the fundamental phasor. An advantage of the MDSC method is that the value of m can be freely set based on the number of harmonics that need to be eliminated from the fault signal. For instance, using $m=14$ substantially reduces the amount of calculations required to determine the basic phasor compared to the Discrete Fourier Transform (DFT). In scenarios like fault detection, where a relay needs to quickly analyze a signal and make a decision, MDSC offers advantages over DFT (Discrete Fourier Transform). DFT typically uses a limited number of samples (e.g., 16, 32, or 64) due to computational constraints. MDSC, on the other hand, can analyze a much larger number of samples, such as the 168 used in this study, or even more than 300 [32]. This increased sample size allows for higher accuracy in fault detection, as it captures more details of the signal. Moreover, MDSC has a lower computational burden compared to DFT, which is crucial for real-time fault detection where quick decision-making is essential for relay operation.

To achieve the MDSC operation on the DDC signal $i_{ddc}(n)$ , follow these steps: $$\begin{align*} I_{\text {MDSC}}^{\text {ddc}}(n) & = \frac {2}{m} \sum _{l=0}^{m-1}I_{0} e^{-\frac {\Delta {t}}{\tau }\left ({{n-\frac {N l}{m}}}\right)}\cdot e^{j \frac {2 \pi l}{m}} \\ & = \frac {2}{m} \sum _{l=0}^{m-1} I_{0} e^{\left ({{-\frac {\Delta {t}}{\tau } n+\frac {N l}{m} \cdot \frac {\Delta {t}}{\tau }+j \frac {2 \pi l}{m}}}\right)}. \tag {21}\end{align*}$$ By utilizing the geometric series, the expression (21) can be further reduced to a simpler form. $$\begin{equation*} I_{\text {MDSC}}^{\text {ddc}}(n)=\frac {2}{m}I_{0}E^{n} \left ({{\frac {1-E^{-N}}{1-E^{-N/m} \cdot e^{j \frac {2\pi }{m}}}}}\right). \tag {22}\end{equation*}$$ To ensure the denominator of (22) to be real, (22) can also be expressed as: $$\begin{align*} & \hspace {-0.5pc}I_{\text {MDSC}}^{\text {ddc}}(n) \\ & = \frac {2}{m}I_{0}E^{n}\left ({{1-E^{-N}}}\right) \\ & \times \left [{{\frac {1-E^{-N / m} \left ({{\cos 2 \pi / m}}\right)+jE^{-N / m} \left ({{\sin 2 \pi / m}}\right)}{1+E^{-2 N / m}-2 E^{-N / m} \left ({{\cos 2 \pi / m}}\right)}}}\right ] \tag {23}\end{align*}$$

In (23), both the exponentially decaying terms $E^{\frac {-N}{m}}$ and $I_{\text {MDSC}}^{\text {ddc}}$ remain unidentified. Three innovative methods are employed to estimate the unknown terms, leveraging the Multiple Delayed Signal Cancellation (MDSC) filter to overcome the limitations of conventional methods. Despite being straightforward and simple to use, the MDSC-based method still provides an inaccuracy for the fundamental frequency component due to the existence of its DDC component $I_{\text {MDSC}}^{\text {ddc}}$ . To overcome this difficulty, the DDC component $I_{\text {MDSC}}^{\text {ddc}}$ will be eliminated in the following section by introducing the auxiliary high-frequency modulation signal [8]. The MDSC-based phasor estimation effectively attenuates the DDC component, enabling precise and rapid phasor estimation, benefiting from its higher sampling rate, and enhancing accuracy in relaying applications.

C. High-Frequency Modulation Technique Using MDSC (Proposed Method (a))

Now, let’s examine a high-frequency modulation signal, denoted as $y(n)$ , which is multiplied by the input fault signal, represented as $i\left ({{n}}\right)$ , as seen below: $$\begin{equation*} y(n) = (-1)^{l} \cdot i\left ({{n}}\right) = (-1)^{l} \cdot \left [{{i_{ddc} \left ({{n}}\right)+i_{ac}\left ({{n}}\right)}}\right ], \tag {24}\end{equation*}$$ where l is an integer variable index of the delayed signals.

Next, the m-length delayed summation is computed for both the fault signal $D_{i}$ and the high-frequency modulation signal $D_{y}$ , as defined: $$\begin{align*} D_{i} & = \frac {2}{m} \sum _{l=0}^{m-1} i \left ({{ n - \frac {Nl}{m} }}\right) \ \\ & = \frac {2}{m} \sum _{l=0}^{m-1} \left [{{ i_{ddc} \left ({{ n - \frac {Nl}{m} }}\right) + i_{ac} \left ({{ n - \frac {Nl}{m} }}\right) }}\right ] \tag {25}\end{align*}$$

Due to the periodic nature of the AC component of the fault current signal $i_{a c}(n)$ , the sum of its delayed values over one full cycle is equal to zero. In other words, $$\begin{equation*} \frac {2}{m} \sum _{l=0}^{m-1} i_{a c}\left ({{n-\frac {Nl}{m}}}\right)=0. \tag {26}\end{equation*}$$ Thus, $D_{i}$ can be computed using the following: $$\begin{align*} D_{i} & = \frac {2}{m} \sum _{l=0}^{m-1} i_{ddc}\left ({{n - \frac {Nl}{m}}}\right) = \frac {2}{m} \sum _{l=0}^{m-1} I_{0} e^{\frac {-\Delta t}{\tau } \left ({{n - \frac {Nl}{m}}}\right)} \\ & = \frac {2I_{0}}{m} \sum _{l=0}^{m-1} E^{\left ({{n - \frac {Nl}{m}}}\right)} = \frac {2I_{0}}{m} E^{n} \sum _{l=0}^{m-1} E^{-Nl/m} \\ & = \frac {2I_{0}}{m} E^{n} \cdot \frac {1 - E^{-N}}{1 - E^{-N/m}} \tag {27}\end{align*}$$

By employing geometric series to analyze (27), we obtain: $$\begin{equation*} D_{i} =\frac {2}{m}I_{0} E^{n} \cdot \frac {\left ({{1-E^{-N}}}\right)}{1-E^{-N / m}}. \tag {28}\end{equation*}$$ The expression (28) can also be rewritten in the following manner: $$\begin{equation*} D_{i}\left ({{1-E^{-N / m}}}\right)=\frac {2}{m}I_{0} E^{n} \left ({{1-E^{-N}}}\right) \tag {29}\end{equation*}$$ Similarly, by taking into account the auxiliary signal $y(n)$ , $D_{y}$ can be computed as: $$\begin{align*} D_{y} & = \frac {2}{m} \sum _{l=0}^{m-1} (-1)^{l} \cdot i\left ({{n - \frac {Nl}{m}}}\right) \\ & = \frac {2}{m} \sum _{l=0}^{m-1} (-1)^{l} \cdot \left [{{ i_{ddc}\left ({{n - \frac {Nl}{m}}}\right) + i_{ac}\left ({{n - \frac {Nl}{m}}}\right) }}\right ] \tag {30}\end{align*}$$

In (30), the AC part is derived to zero, as shown below: $$\begin{equation*} {} {D}_{y_{ac}}=\frac {2}{m} \sum _{l=0}^{m-1}(-1)^{l}\cdot i_{a c}\left ({{n-\frac {N l}{m}}}\right)=0. \tag {31}\end{equation*}$$ Here is the proof, consider the input signal (1) and the phasor representation of ${D}_{y_{ac}}$ we get $$\begin{equation*} \tilde {D}_{y_{ac}}=\sum _{l=0}^{m-1}(-1)^{l}\left [{{\sum _{h=1}^{m-1} I_{h} e^{j\frac {2\pi }{N}\left ({{n-\frac {Nl}{m}}}\right)}e^{j \theta _{h}}}}\right ] \tag {32}\end{equation*}$$ where ${D}_{y_{ac}} = Re(\tilde {D}_{y a c})$ $$\begin{equation*} \tilde {D}_{y_{ac}}=\sum _{l=0}^{m-1}(-1)^{l}\left [{{\sum _{h=1}^{m-1} I_{h} e^{j\frac {2\pi }{N}\left ({{n-\frac {Nl}{m}}}\right)}}}\right ] \tag {33}\end{equation*}$$ where: $I_{h}=\left |{{I_{h}}}\right | e^{j \theta _{h}}$ and for simplification let’s consider only the fundamental signal, where $h=1$ .

Using geometric series equation (32) can solved as shown below $$\begin{align*} \tilde {D}_{y_{ac}}& =\sum _{l=0}^{m-1}(-1)^{l}\left [{{I_{1} e^{j\frac {2\pi }{N}\left ({{n-\frac {Nl}{m}}}\right)}}}\right ] \\ & =\sum _{l=0}^{m-1}I_{1} e \big(^{j\frac {2\pi }{N}\big)^{n}}\left [{{ (-1)^{l} \cdot e^{j\frac {2\pi }{N}^{\left ({{-\frac {Nl}{m}}}\right)}}}}\right ] \\ & =\sum _{l=0}^{m-1}I_{1} \lambda ^{n}\left [{{ (-1)^{l} \cdot e^{j\frac {2\pi }{N}^{\left ({{-\frac {Nl}{m}}}\right)}}}}\right ] \\ & = I_{1} \lambda ^{n} \left [{{ \frac {1- e \big(^{j \frac {2\pi }{N}\frac {-N}{m}\big)^{m}} \cdot (-1)^{m}}{1 - (-1) e^{j\frac {2\pi }{N}\frac {-N}{m}}} }}\right ] \\ & = I_{1} \lambda ^{n} \left [{{\frac {1- e^{-j2 \pi }}{1+e^{-j\frac {2\pi }{m}}} }}\right ] \tag {34}\end{align*}$$ where $\lambda =e^{j}\frac {2\pi }{N}$ , where $e^{-j 2k \pi } = 1$ and where $(-1)^{m} = 1$ , because m is an even integer [8]. $$\begin{equation*} \tilde {D}_{y_{ac}}= I_{1} \lambda ^{n} \frac {1-1}{1+e^{-j\frac {2\pi }{m}}} = 0 \tag {35}\end{equation*}$$

So, the remaining DDC portion of the input fault current under the high-frequency modulation can be mathematically represented as: $$\begin{align*} D_{y} & =\frac {2}{m} \sum _{l=0}^{m-1}(-1)^{l}\left [{{i_{ddc}\left ({{n-\frac {N l}{m}}}\right)}}\right ] \\ & =\frac {2}{m} \sum _{l=0}^{m-1}(-1)^{l}\left [{{I_{0} e^{\frac {-\Delta {t}}{\tau }^{\left ({{n-\frac {N l}{m}}}\right)}}}}\right ] \\ & =\frac {2}{m} I_{0}\sum _{l=0}^{m-1}\left [{{(-1)^{l} E^{\left ({{n-\frac {N l}{m}}}\right)}}}\right ] \\ & =\frac {2}{m} I_{0} E^{n} \frac {1-E^{\left ({{-\frac {N}{m}}}\right)^{m}}(-1)^{m}}{1-(-1)E^{-N / m}}, \tag {36}\end{align*}$$ where $(-1)^{m}=1$ , when given delayed signals are even number in nature. In the end, by utilizing geometric series to (36), $D_{y}$ can be shown as follows: $$\begin{equation*} D_{y}=\frac {2}{m} I_{0} E^{n} \frac {\left ({{1-E^{-N}}}\right)}{1+E^{-N/m}}. \tag {37}\end{equation*}$$ The aforementioned equation can also be restated as $$\begin{equation*} D_{y}\left ({{1+E^{-N / m}}}\right)=\frac {2}{m}I_{0} E^{n} \left ({{1-E^{-N}}}\right) \tag {38}\end{equation*}$$ Now, divide (28) by (37), we get $$\begin{equation*} \frac {D_{i}}{D_{y}}=\frac {1+E^{-N / m}}{1-E^{-N / m}}. \tag {39}\end{equation*}$$ With further simplifications, let’s calculate $E^{-N/m}$ as follows: $$\begin{equation*} E^{-N/m}=\frac {D_{i}-D_{y}}{D_{i}+D_{y}} \tag {40}\end{equation*}$$ To calculate the DDC with $D_{i}$ and $D_{y}$ , compare (22), (29) and (38). This gives us $$\begin{align*} & \hspace {-0.5pc}I_{MDSC}^{ddc_{i}} \\ & = D_{i}\left ({{1-E^{-N / m}}}\right) \\ & \quad \times \left [{{\frac {1-E^{-N / m} \left ({{\cos 2 \pi / m}}\right)+jE^{-N / m} \left ({{\sin 2 \pi / m}}\right)}{1+E^{-2 N / m}-2 E^{-N / m} \left ({{\cos 2 \pi / m}}\right)}}}\right ], \tag {41}\end{align*}$$ and $$\begin{align*} & \hspace {-0.5pc}I_{MDSC}^{ddc_{y}} \\ & = D_{y}\left ({{1+E^{-N / m}}}\right) \\ & \quad \times \left [{{\frac {1-E^{-N / m} \left ({{\cos 2 \pi / m}}\right)+jE^{-N / m} \left ({{\sin 2 \pi / m}}\right)}{1+E^{-2 N / m}-2 E^{-N / m} \left ({{\cos 2 \pi / m}}\right)}}}\right ], \tag {42}\end{align*}$$ Here, the $I_{MDSC}^{ddc_{i}}$ (41) and $I_{MDSC}^{ddc_{y}}$ (42) is estimated based on $D_{i}$ and $D_{y}$ , respectively. However, $I_{MDSC}^{ddc_{i}}$ and $I_{MDSC}^{ddc_{y}}$ will yield identical estimated values.

After the DDC estimation (41) and (42), the estimated DDC should be subtracted from the original signal to obtain the fundamental phasor, which is shown as $$\begin{equation*} I_{\text {MDSC}_{1}}(n)=I_{\text {MDSC}}(n)-I_{\text {MDSC}}^{\text {ddc}}(n) \tag {43}\end{equation*}$$

1) Flowchart of the High-Frequency Modulation Technique (Proposed Method (a))

As depicted in Fig. 7, the proposed strategy unfolds as follows: Initially, a continuous-time signal is detected and proportionally reduced via a current transformer. Following this, the $i(t)$ signal is filtered using an anti-aliasing low-pass filter to eradicate the anti-aliasing effect. The signal then undergoes a transformation from continuous-time to discrete-time through an ADC converter. This converted signal is fed into a relay that implements the MDSC filter. Subsequently, the DDC is calculated using the values of $D_{i}$ , $D_{y}$ , and $E^{-N/m}$ . The final step involves subtracting this computed DDC or DDCs from the original signal, resulting in the acquisition of the precise fundamental frequency phasor.

FIGURE 7.

Flowchart of the proposed method (a): High-frequency modulation.

D. Down-Sampling High-Frequency Modulation Method Using MDSC (Proposed Method (b))

This method proposes an enhanced MDSC-based phasor estimation algorithm that utilizes an auxiliary signal generated from the down-sampling of the fault current signal [9]. The suggested algorithm not only reduces computational complexity but also enhances the benefits of the proposed method (a), shown in subsection C, making it suitable for digital relaying.

Now, let’s consider a distinct auxiliary down-sampling signal denoted as $z(n)$ , which is multiplied with the original input fault signal $i\left ({{n}}\right)$ as below: $$\begin{align*} z(n) = \frac {1+(-1)^{l}}{2} \cdot i\left ({{n}}\right) = \frac {1+(-1)^{l}}{2} \cdot \left [{{i_{ddc} \left ({{n}}\right)+i_{ac}\left ({{n}}\right)}}\right ], \tag {44}\end{align*}$$ where l is an integer variable index of the delayed signals.

Next, the m-length delayed summation is computed for both the fault signal $D_{i}$ and the down-sampling signal $D_{z}$ , as defined: $$\begin{align*} D_{i} & = \frac {2}{m} \sum _{l=0}^{m-1} i\left ({{n-\frac {N l}{m}}}\right) \\ & = \frac {2}{m} \sum _{l=0}^{m-1} i_{ddc}\left ({{n-\frac {N l}{m}}}\right)+i_{ac}\left ({{n-\frac {N l}{m}}}\right) \tag {45}\end{align*}$$ Since the AC part of the original fault current signal $i_{a c}(n)$ is periodic, its delayed summing over one full cycle equals zero. That is, $$\begin{equation*} \frac {2}{m} \sum _{l=0}^{m-1} i_{a c}\left ({{n-\frac {Nl}{m}}}\right)=0. \tag {46}\end{equation*}$$ Therefore, $D_{i}$ can be computed as follows: $$\begin{align*} D_{i} & = \frac {2}{m} \sum _{l=0}^{m-1} i_{ddc}\left ({{n - \frac {Nl}{m}}}\right) = \frac {2}{m} \sum _{l=0}^{m-1} I_{0} e^{\frac {-\Delta t}{\tau } \left ({{n - \frac {Nl}{m}}}\right)} \\ & = \frac {2I_{0}}{m} \sum _{l=0}^{m-1} E^{\left ({{n-\frac {Nl}{m}}}\right)} = \frac {2I_{0}}{m} E^{n} \cdot \sum _{l=0}^{m-1} E^{-\frac {Nl}{m}} \\ & = \frac {2I_{0}}{m} E^{n} \cdot \frac {1 - E^{\left ({{\frac {-N}{m}}}\right)m}}{1 - E^{-N/m}} \tag {47}\end{align*}$$

By employing geometric series to analyze (47), the following is obtained: $$\begin{equation*} D_{i} =\frac {2}{m}I_{0} E^{n} \cdot \frac {\left ({{1-E^{-N}}}\right)}{1-E^{-N / m}}. \tag {48}\end{equation*}$$ The expression (48) can also be rewritten as follows: $$\begin{equation*} D_{i}\left ({{1-E^{-N / m}}}\right)=\frac {2}{m}I_{0} E^{n} \left ({{1-E^{-N}}}\right) \tag {49}\end{equation*}$$ Similarly, by considering the auxiliary down sampling signal $z(n)$ , $D_{z}$ can be calculated as: $$\begin{align*} D_{z} & = \frac {2}{m} \sum _{l=0}^{m-1} \frac {1+(-1)^{l}}{2} \cdot i\left ({{n-\frac {Nl}{m}}}\right) \\ & = \frac {2}{m} \sum _{l=0}^{m-1} \frac {1+(-1)^{l}}{2} \cdot \left [{{ i_{ddc}\left ({{n - \frac {Nl}{m}}}\right) + i_{ac}\left ({{n - \frac {Nl}{m}}}\right) }}\right ] \tag {50}\end{align*}$$ In (50), the AC component is calculated to zero as shown in the proposed method (a), and the following is obtained, $$\begin{equation*} \frac {2}{m} \sum _{l=0}^{m-1}\frac {1+(-1)^{l}}{2}\cdot i_{a c}\left ({{n-\frac {N l}{m}}}\right)=0. \tag {51}\end{equation*}$$ So, the remaining DDC part of the fault current under the auxiliary down sampling signal can be expressed as: $$\begin{align*} D_{z} & =\frac {2}{m} \sum _{l=0}^{m-1}\frac {1+(-1)^{l}}{2}\left [{{i_{ddc}\left ({{n-\frac {N l}{m}}}\right)}}\right ] \\ & =\frac {2}{m} \sum _{l=0}^{m-1}\frac {1+(-1)^{l}}{2}\left [{{I_{0} e^{\frac {-\Delta {t}}{\tau }^{\left ({{n-\frac {N l}{m}}}\right)}}}}\right ] \\ & =\frac {2}{m} I_{0}\sum _{l=0}^{m-1}\left [{{\frac {1+(-1)^{l}}{2} E^{\left ({{n-\frac {N l}{m}}}\right)}}}\right ] \\ & =\frac {2}{m} I_{0} E^{n} \left [{{\frac {1-E^{\left ({{-\frac {N}{m}}}\right)^{m}}}{1-E^{-N / m}} +\frac {1-E^{\left ({{-\frac {N}{m}}}\right)^{m}}(-1)^{m}}{1-(-1)E^{-N / m}}}}\right ] \tag {52}\end{align*}$$ where $(-1)^{m}=1$ , similar to the above method, when an even number of delayed signals is considered. Finally, by applying geometric series to (52), $D_{z}$ can be expressed as follows: $$\begin{equation*} D_{z}=\frac {2}{m} I_{0} E^{n} \left [{{\frac {1-E^{-N}}{1-E^{-N/m}}+\frac {1-E^{-N}}{1+E^{-N/m}}}}\right ]. \tag {53}\end{equation*}$$ The above (53) can also be rewritten as $$\begin{align*} D_{z}& =\frac {2}{m}\frac {I_{0} E^{n} \left ({{1-E^{-N}}}\right)}{\left ({{1-E^{-N/m}}}\right)\left ({{1+E^{-N/m}}}\right)} \\ & = \frac {D_{i}}{\left ({{1+E^{-N/m}}}\right)} \tag {54}\end{align*}$$

By further simplifications, let’s estimate $E^{-N/m}$ as follows: $$\begin{equation*} E^{-N/m}=\frac {D_{i}}{D_{z}} -1 \tag {55}\end{equation*}$$

To estimate the DDC using $D_{i}$ and $D_{z}$ , by comparing (22), (49) and (54), we get: $$\begin{align*} & \hspace {-0.5pc}I_{MDSC}^{ddc_{i}} \\ & = D_{i}\left ({{1-E^{-N / m}}}\right) \\ & \quad \times \left [{{\frac {1-E^{-N / m} \left ({{\cos 2 \pi / m}}\right)+jE^{-N / m} \left ({{\sin 2 \pi / m}}\right)}{1+E^{-2 N / m}-2 E^{-N / m} \left ({{\cos 2 \pi / m}}\right)}}}\right ], \tag {56}\end{align*}$$ and $$\begin{align*} & \hspace {-0.5pc}I_{MDSC}^{ddc_{z}} \\ & =D_{z}\left ({{1-E^{-N / m}}}\right)\left ({{1+E^{-N / m}}}\right) \\ & \quad \times \left [{{\frac {1-E^{-N / m} \left ({{\cos 2 \pi / m}}\right)+jE^{-N / m} \left ({{\sin 2 \pi / m}}\right)}{1+E^{-2 N / m}-2 E^{-N / m} \left ({{\cos 2 \pi / m}}\right)}}}\right ], \tag {57}\end{align*}$$ where the $I_{MDSC}^{ddc_{i}}$ (56) is estimated based on $D_{i}$ and the $I_{MDSC}^{ddc_{z}}$ (57) is estimated based on $D_{z}$ , respectively. However, $I_{MDSC}^{ddc_{i}}$ and $I_{MDSC}^{ddc_{z}}$ will produce the same estimated values.

After the DDC estimation (56) and (57), the estimated DDC should be subtracted from the original signal to obtain the fundamental phasor, which is shown as $$\begin{equation*} I_{\text {MDSC}_{1}}(n)=I_{\text {MDSC}}(n)-I_{\text {MDSC}}^{\text {ddc}}(n) \tag {58}\end{equation*}$$

1) Flowchart of the High-Frequency Modulation Based Down-Sampling Technique (Proposed Method (b))

The proposed strategy, illustrated in Fig. 8, comprises the following steps:

FIGURE 8.

Flowchart of the proposed method (b): High-frequency modulation based downsampling.

a: Signal Detection and Reduction

A continuous-time signal is detected and proportionally reduced using a current transformer.

b: Anti-Aliasing Filtering

The resulting $i(t)$ signal is passed through an anti-aliasing low-pass filter to eliminate potential aliasing effects.

c: Analog-to-Digital Conversion

The filtered signal is converted from continuous-time to discrete-time format using an ADC converter.

d: MDSC Filtering

The digitized signal is then processed by a relay implementing an MDSC (Multiple Delayed Signal Cancellation) filter.

e: DDC Calculation

The DDC component is calculated based on the values of $D_{i}$ , $D_{z}$ , and $E^{-N/m}$ . Finally, the calculated DDC component is subtracted from the original signal to obtain the precise fundamental frequency phasor.

E. Four Half Cycle Based Algorithm Using MDSC Filter (Proposed Method (c))

This method introduces a phasor estimation algorithm that leverages the half-cycle Multiple Delayed Signal Cancellation (HCMDSC). This method employs four HCMDSC calculations derived from two consecutive half-cycle sample sets. These calculations utilize both the original vector and its complex conjugate in the HCMDSC computation, providing valuable insights into the error introduced by the DDC component. The elements within each of the two half-cycle datasets are individually summed. The first dataset corresponds to the initial two half cycles of the signal, while the second dataset corresponds to the following two half cycles. By leveraging these two sums, the DDC-induced error in the phasor estimate is accurately estimated and subsequently compensated [31].

To calculate the DDCs, the first step involves dividing a complete cycle sample set into two half cycles, $I_{\mathrm {HCMDSC_{a}}}$ and $I_{\mathrm {HCMDSC_{b}}}$ . Similarly, extract the following two half cycles, $I_{\mathrm {HCMDSC_{c}}}$ and $I_{\mathrm {HCMDSC_{d}}}$ , from the subsequent cycle. $$\begin{align*} I_{\mathrm {HCMDSC_{a}}}(n)& = \frac {2}{m} \sum _{l=0}^{m-1} i\left ({{n-\frac {N l}{2m}}}\right) e^{-j \frac {\pi l}{m}} \\ & = I_{\text {HCMDSC}_{a}}^{\text {ac}}(n)+I_{\text {HCMDSC}_{a}}^{\text {ddc}}(n), \tag {59}\end{align*}$$

Equation (59) can be solved as shown below for AC and DDC parts by applying geometric series. At first, AC part is shown below $$\begin{equation*} I_{\text {HCMDSC}_{a}}^{\text {ac}}(n)=\frac {I_{1}}{2} \cdot e^{j \theta _{1}} \tag {60}\end{equation*}$$

Now solve the DDC part $$\begin{align*} I_{\text {HCMDSC}_{a}}^{\text {ddc}}(n) & = \frac {2}{m} \sum _{l=0}^{m-1}I_{0} e^{-\frac {\Delta {t}}{\tau }\left ({{n-\frac {N l}{2m}}}\right)}\cdot e^{-j \frac { \pi l}{m}} \\ & = \frac {2}{m} \sum _{l=0}^{m-1} I_{0} e^{\left ({{-\frac {\Delta {t}}{\tau } n+\frac {N l}{2m} \cdot \frac {\Delta {t}}{\tau }-j \frac { \pi l}{m}}}\right)}. \tag {61}\end{align*}$$ By utilizing the geometric series, the expression (61) can be further reduced to a simpler form. $$\begin{equation*} I_{\text {HCMDSC}{a}}^{\text {ddc}}(n)=\frac {2}{m}I_{0}E^{n} \left ({{\frac {1+E^{-N/2}}{1-E^{-N/2m} \cdot e^{-j \frac {\pi }{m}}}}}\right). \tag {62}\end{equation*}$$ Finally, by combining the AC and DDC parts, the result is obtained. $$\begin{align*} I_{\mathrm {HCMDSC_{a}}}(n)=\frac {I_{1}}{2} e^{j \theta _{1}}+\frac {2}{m}I_{0}E^{n} \left ({{\frac {1+E^{-N/2}}{1-E^{-N/2m} \cdot e^{-j \frac {\pi }{m}}}}}\right) \tag {63}\end{align*}$$

Similarly, the second half cycle is calculated as shown below $$\begin{align*} I_{\mathrm {HCMDSC_{b}}}(n)& = \frac {2}{m} \sum _{l=0}^{m-1} i\left ({{n-\frac {N l}{2m}-\frac {N }{2}}}\right) e^{-j \frac {\pi l}{m}} \\ & = I_{\text {HCMDSC}_{b}}^{\text {ac}}(n)+I_{\text {HCMDSC}_{b}}^{\text {ddc}}(n), \tag {64}\end{align*}$$

Equation (64) can be solved as shown below for AC and DDC parts by applying geometric series. The AC part is calculated as shown below $$\begin{equation*} I_{\text {HCMDSC}_{b}}^{\text {ac}}(n)=-\frac {I_{1}}{2} \cdot e^{j \theta _{1}} \tag {65}\end{equation*}$$ Now solve the DDC part by utilizing the geometric series, the expression (64) can be further reduced to a simpler form. $$\begin{equation*} I_{\text {HCMDSC}_{b}}^{\text {ddc}}(n)=\frac {2}{m}I_{0}E^{n} \left ({{\frac {1+E^{-N/2}}{1-E^{-N/2m} \cdot e^{-j \frac {\pi }{m}}}}}\right). \tag {66}\end{equation*}$$

Finally, by combining the AC and DDC parts, the result is obtained. $$\begin{align*} I_{\mathrm {HCMDSC_{b}}}(n)=-\frac {I_{1}}{2} e^{j \theta _{1}}+\frac {2}{m}I_{0}E^{n} \left ({{\frac {1+E^{-N/2}}{1-E^{-N/2m} \cdot e^{-j \frac {\pi }{m}}}}}\right) \tag {67}\end{align*}$$

Now similarly solve for the next two half cycles $I_{\mathrm {HCMDSC_{c}}}$ and $I_{\mathrm {HCMDSC_{d}}}$ with a complex conjugate $$\begin{align*} I_{\mathrm {HCMDSC_{c}}}(n)= & \frac {2}{m} \sum _{l=0}^{m-1} i\left ({{n-\frac {N l}{2m}}}\right) e^{j \frac {\pi l}{m}} \\ = & I_{\text {HCMDSC}_{c}}^{\text {ac}}(n)+I_{\text {HCMDSC}_{c}}^{\text {ddc}}(n), \tag {68}\end{align*}$$

Equation (68) can be solved as shown below for AC and DDC parts by applying geometric series. At first, the AC part is shown as $$\begin{equation*} I_{\text {HCMDSC}_{c}}^{\text {ac}}(n)=\frac {I_{1}}{2} \cdot e^{-j \theta _{1}} \tag {69}\end{equation*}$$

Now solve the DDC part $$\begin{align*} I_{\text {HCMDSC}_{c}}^{\text {ddc}}(n) & = \frac {2}{m} \sum _{l=0}^{m-1}I_{0} e^{-\frac {\Delta {t}}{\tau }\left ({{n-\frac {N l}{2m}}}\right)}\cdot e^{j \frac { \pi l}{m}} \\ & = \frac {2}{m} \sum _{l=0}^{m-1} I_{0} e^{\left ({{-\frac {\Delta {t}}{\tau } n+\frac {N l}{2m} \cdot \frac {\Delta {t}}{\tau }+j \frac { \pi l}{m}}}\right)}. \tag {70}\end{align*}$$ By utilizing the geometric series, the expression (70) can be further reduced to a simpler form. $$\begin{equation*} I_{\text {HCMDSC}{c}}^{\text {ddc}}(n)=\frac {2}{m}I_{0}E^{n} \left ({{\frac {1+E^{-N/2}}{1-E^{-N/2m} \cdot e^{j \frac {\pi }{m}}}}}\right). \tag {71}\end{equation*}$$ Finally, by combining the AC and DDC parts, the result is obtained. $$\begin{align*} I_{\mathrm {HCMDSC_{c}}}(n)=\frac {I_{1}}{2} e^{-j \theta _{1}}+\frac {2}{m}I_{0}E^{n} \left ({{\frac {1+E^{-N/2}}{1-E^{-N/2m} \cdot e^{j \frac {\pi }{m}}}}}\right) \tag {72}\end{align*}$$

Similarly, the second half cycle is calculated as $$\begin{align*} I_{\mathrm {HCMDSC_{d}}}(n)& = \frac {2}{m} \sum _{l=0}^{m-1} i\left ({{n-\frac {N l}{2m}-\frac {N }{2}}}\right) e^{j \frac {\pi l}{m}} \\ & = I_{\text {HCMDSC}_{d}}^{\text {ac}}(n)+I_{\text {HCMDSC}_{d}}^{\text {ddc}}(n), \tag {73}\end{align*}$$

Equation (73) can be solved to find the AC and DDC components by utilizing geometric series. The initial AC component is presented below: $$\begin{equation*} I_{\text {HCMDSC}_{d}}^{\text {ac}}(n)=-\frac {I_{1}}{2} \cdot e^{-j \theta _{1}} \tag {74}\end{equation*}$$ Now solve the DDC part by utilizing the geometric series, the expression (73) can be further reduced to a simpler form. $$\begin{equation*} I_{\text {HCMDSC}{d}}^{\text {ddc}}(n)=\frac {2}{m}I_{0}E^{n} \left ({{\frac {1+E^{-N/2}}{1-E^{-N/2m} \cdot e^{j \frac {\pi }{m}}}}}\right). \tag {75}\end{equation*}$$

Finally, we get $$\begin{align*} I_{\mathrm {HCMDSC_{d}}}(n)=-\frac {I_{1}}{2} e^{-j \theta _{1}}+\frac {2}{m}I_{0}E^{n} \left ({{\frac {1+E^{-N/2}}{1-E^{-N/2m} \cdot e^{j \frac {\pi }{m}}}}}\right) \tag {76}\end{align*}$$

For further simplification add (63) and (67), (72) and (76), the AC parts cancel each other, and the DDC parts remain.

where $I_{\mathrm {HCMDSC_{a}}}$ and $I_{\mathrm {HCMDSC_{b}}}$ denotes the first two consecutive half signal and $I_{\mathrm {HCMDSC_{c}}}$ and $I_{\mathrm {HCMDSC_{d}}}$ are the next two consecutive half signals with a complex conjugate. In the next step, by dividing $I_{\mathrm {HCMDSC_{c}}} + I_{\mathrm {HCMDSC_{d}}}$ by $I_{\mathrm {HCMDSC_{a}}} + I_{\mathrm {HCMDSC_{b}}}$ , the equation below is obtained. $$\begin{equation*} D=\frac {I_{\text {HCMDSC}_{c}}+I_{\text {HCMDSC}_{d}}}{I_{\text {HCMDSC}_{a}}+I_{\text {HCMDSC}_{b}}}=\frac {1-E^{\frac {-N}{2m}} e^{-j \frac {\pi }{m}}}{1-E^{\frac {-N}{2m}} e^{j \frac { \pi }{m}}} \tag {77}\end{equation*}$$ From the above $\left ({{E^{-\frac {N}{2m}}=e^{-\frac {\Delta t}{\tau }}}}\right)$ can be calculated as follows $$\begin{equation*} E^{-\frac {N}{2m}}=\frac {1-D} {e^{\frac {-j\pi }{m}}-D\left ({{e^{j \frac { \pi }{m}}}}\right)} \tag {78}\end{equation*}$$ Finally, by combining (22), (63), (67) and (78) the accurate phasor estimation error caused by DDC can be calculated as $$\begin{equation*} I_{\text {MDSC}}^{\text {ddc}}(n) = \frac {\left ({{ I_{\text {HCMDSC}_{a}} + I_{\text {HCMDSC}_{b}} }}\right) \left ({{ 1 - E^{\frac {-N}{2}} }}\right)}{\left ({{1 + E^{\frac {-N}{2}}}}\right)\left ({{ 1 + E^{\frac {-N}{2m}} e^{-j \frac {\pi }{m}} }}\right)} \tag {79}\end{equation*}$$

After the DDC estimation 79, the estimated DDC should be subtracted from the original signal to obtain the fundamental phasor, which is shown as $$\begin{equation*} I_{\text {MDSC}_{1}}(n)=I_{\text {MDSC}}(n)-I_{\text {MDSC}}^{\text {ddc}}(n) \tag {80}\end{equation*}$$

1) Flowchart of the Half Cycle Based MDSC (Proposed Method (c))

Fig. 9, illustrates a process for accurately estimating the fundamental frequency phasor of a current signal. Initially, the raw signal is subjected to anti-aliasing filtering before being sampled and converted into a digital format. Due to the utilization of the half-cycle MDSC, even-order harmonics persist even after the elimination process. To address this, a straightforward method known as Even-order harmonics Pre-suppression is employed [31]. The MDSC filter is then applied, extracting specific frequency components. Utilizing these values, the $E^{-N/2m}$ factor 78 and DDC 79 component error are calculated, facilitating the estimation of the fundamental frequency phasor.

FIGURE 9.

Flowchart of the proposed method (c): Half cycle based MDSC.

SECTION III. Performance Evaluation and Discussions

Two distinct signal-generating types, computer-generated signals and simulation-generated signals based on Matlab/ Simulink, were employed to evaluate the efficacy of the proposed approach. The evaluation parameters for different methods are predicated on [12]. The fundamental frequency for the MDSC-based algorithm is set to 60 Hz, and N is set to 168 samples, compared with the DFT-based algorithm with 32 samples per cycle. An analog low-pass filter of the second order was employed to negate the anti-aliasing effect. DFT, constrained by computational limitations, typically utilizes a limited number of samples (e.g., 16, 32, or 64). Conversely, MDSC can analyze a significantly larger number of samples, such as the 168 used in this study, or even exceeding 300. This expanded sample size translates to heightened accuracy in fault detection, as it enables the capture of more intricate signal details. Furthermore, MDSC’s lower computational burden compared to DFT makes it particularly well-suited for real-time fault detection scenarios, where rapid decision-making is paramount for efficient relay operation. The accuracy and performance of the three proposed MDSC approaches were compared with four other methods, such as conventional FCDFT, Cosine filter (CF), CharmDF [20], Modified DFT (MDFT) [12].

The performance of phasor estimation methods is rigorously evaluated using three key metrics: rise time $(t_{R})$ , settling time $(t_{S})$ , and percentage overshoot $(PO)$ which is shown from Table 1 to Table 11. Rise time indicates how quickly a waveform reaches its expected value, measuring the duration from 10 to 90 of its final amplitude. Settling time quantifies the duration it takes for the waveform to stabilize within a 5-error band around the expected value. Percentage overshoot reveals the maximum deviation of the waveform beyond its expected value, normalized for comparison. These metrics collectively provide a comprehensive picture of the accuracy and dynamic response of different phasor estimation techniques, facilitating informed decision-making in selecting the most suitable method for specific applications.

TABLE 1 Result Comparison of 0.5 Time Constant- One DDC

TABLE 2 Result Comparison of 5 Time Constant- One DDC

TABLE 3 Result Comparison of 0.5 Time Constant- Two DDCs

TABLE 4 Result Comparison of 5 Time Constant- Two DDCs

TABLE 5 Result Comparison of 0.5 Time Constant: Two DDC With Harmonics

TABLE 6 Result Comparison of 5 Time Constant: Two DDC With Harmonics

TABLE 7 Result Comparison of 0.5 Time Constant: Two DDC With Harmonics and Noise (40db)

TABLE 8 Result Comparison of 0.5 Time Constant: Two DDC With Harmonics and Noise (50db)

TABLE 9 Off Nominal Frequency Condition

TABLE 10 Comparison Result: LG Fault With 0 (ohms)

TABLE 11 Comparison Result: LG Fault With 5 (ohms)

A. Computer Generated Signals

1) Basic Signal With Single DDC

In this particular scenario, the analysis involves a signal that includes one DDC and a fundamental component. $$\begin{equation*} i(n)=I_{0}. e^{-\frac {n \Delta t}{\tau }}-I_{1} \cos \left ({{\frac {2 \pi }{N} n+\phi _{1}}}\right) \tag {81}\end{equation*}$$

The measured signal (81) was analyzed using both the proposed methods (a), (b), (c) and existing methods to evaluate their effectiveness in accurately estimating the fundamental phasor under varying DDC time constants($\tau = 0.5$ and 5 cycles). Fig. 10, and Fig. 12, show that the FCDFT and Cosine methods suffer from oscillatory inaccuracies due to DDC error, while proposed methods (a) and (b) along with CharmDF-method provide satisfactory results. The proposed method (c) outperforms all others, showing superior rise time, settling time, and percentage overshoot, as demonstrated in Table 1 and Table 3.

FIGURE 10.

Test case with 0.5 time constant: One DDC.

FIGURE 11.

Test case with 5 time constant: One DDC.

FIGURE 12.

Test case with 0.5 time constant: Two DDCs.

2) Basic Signal With Two DDC

In this particular scenario, the analysis involves a signal that includes two DDCs and a fundamental component. $$\begin{equation*} i(n)=I_{p}. e^{-\frac {n \Delta t}{\tau _{p}}}+I_{s}. e^{-\frac {n \Delta t}{\tau _{s}}}-I_{1} \cos \left ({{\frac {2 \pi }{N} n+\phi _{1}}}\right) \tag {82}\end{equation*}$$

In this case study, $\tau _{p}$ and $\tau _{s}$ represent the primary and secondary time constants of the DDCs, respectively, while $I_{p}$ and $I_{s}$ denote the magnitudes of the primary and secondary DDCs. As observed in Fig. 11, and Fig. 13, the FCDFT method introduces significant fluctuation in the calculated phasor due to the influence of two DDC errors. The first error originates from the fault current signal, and the second results from current transformer (CT) saturation. The measured signal (82) is processed using the proposed methods (a), (b), (c), and other existing techniques to determine the fundamental phasor. This is done with a primary time constant $\tau _{p}$ of 0.5 and 5 cycles and a secondary time constant $\tau _{s}$ of 20 cycles. The proposed methods (a), (b), and (c) surpass other strategies in terms of eliminating the two DDCs. However, when compared to other existing methods, the CharmDF-based phasor still encounters difficulties in achieving precise estimation and exhibits fluctuations. The proposed method (c) outperforms all other methods, as evidenced by the superior results in terms of rise time (ms), settling time (ms), and percentage overshoot (%) presented in Table 2 and Table 4.

FIGURE 13.

Test case with 5 time constant: Two DDCs.

3) Basic Signal With Two DDCs and Harmonics

$$\begin{align*} i(n)& =I_{p}. e^{-\frac {n \Delta t}{\tau _{p}}}+I_{s}. e^{-\frac {n \Delta t}{\tau _{s}}} \\ & \quad -\sum _{h=1}^{m-1}I_{h} \cos \left ({{\frac {2 \pi }{N} n+\phi _{h}}}\right) \tag {83}\end{align*}$$

In this situation, the fault current signal comprises both harmonic elements and multiple DDCs, as illustrated by (83). The fundamental phasors extracted from this signal for time constants of 0.5 and 5 cycles are shown in Fig. 14, and Fig. 15. Owing to their comprehensive harmonic rejection capabilities, the conventional FCDFT and CharmDFT methods function effectively in the face of harmonic distortions. However, these methods are not devoid of errors due to DDCs. In the presence of harmonics, the MDFT approach and the proposed methods (a), (b), and (c) exhibit good performance, but the proposed method (c) stands out with its superior convergence speed and precision, which is evident through Table 5 and Table 6.

FIGURE 14.

Test case with 0.5 time constant: Two DDCs with harmonics.

FIGURE 15.

Test cases with 5 time constant: Two DDCs with harmonics.

4) Basic Signal With Two DDCs and Harmonics and Noises

To assess the effectiveness of the MDSC approach in noisy environments, the test signal (83) is added up with white Gaussian noise. The phasor estimates resulting from this combination are shown in Fig. 16, and Fig. 17, under 40 dB and 50 dB SNR conditions, respectively. It’s evident that the proposed methods (a), (b), and (c) maintain their efficiency even in these conditions, demonstrating their superiority over other techniques in mitigating noise effects. However, the MDFT, due to the subtraction of even and odd samples, has the drawback of requiring an extra low pass filter in noisy situations. Finally, proposed method (c) outperforms all other methods in minimizing the noise which is evident through Table 7 and Table 8.

FIGURE 16.

Test case with 0.5 time constant: Two DDCs with harmonics and noise (40db).

FIGURE 17.

Test case with 0.5 time constant: Two DDCs with harmonics and noise (50db).

5) Basic Signal for off-Nominal Frequency

Under fault conditions, slight deviations from the fundamental frequency, known as off-nominal frequencies, are inherent. This phenomenon is influenced by fault severity and system inertia. Fig. 18, illustrates the phasors extracted from the signal (83) at an off-nominal frequency of 60.3 Hz. In this scenario, the proposed methods (a), (b), and (c) effectively estimate the DDC components better than the other methods. Notably, both MDFT and the proposed methods successfully manage DDCs under off-nominal frequency conditions, whereas other conventional methods fail to achieve this. The comparative results of all techniques are displayed in Table 9, from which it can be concluded that proposed method (c) is the best option in off-nominal conditions. Non-synchronous sampling introduces several challenges for MDSC-based phasor estimation, primarily affecting accuracy in the presence of decaying DC components (DDCs), harmonics, and off-nominal frequencies. The method’s ability to attenuate DDCs and provide precise phasor estimation is compromised under non-synchronous conditions due to phase and frequency errors, aliasing, and leakage. While the proposed method provides an improved solution, it does not fully mitigate the issue. To further reduce the impact of non-synchronous sampling, adaptive sampling rates can be introduced. However, this approach adds complexity and increases processing requirements [37], [38].

FIGURE 18.

Test cases with 0.5 time constant: Off nominal frequency.

SECTION IV. Real Transmission Line Simulation Studies

Simulations were conducted on the MATLAB/Simulink platform to verify and validate the results of the proposed methods (a), (b), and (c) in comparison with four existing methods. The outcomes are presented below.

A. IEEE 9-Bus Power System

To evaluate the phasor estimation techniques, fault current signals are produced using a 230 kV/60 Hz power system model. This system is a simple IEEE 9-Bus system utilized for testing various fault conditions as shown in Fig. 19.The data for the IEEE 9-bus system are taken from [46]. This study considers two fault scenarios with 0 and 5 ohms fault resistances with single phase to ground (LG) fault and Three phase to ground (LLLG) fault. It is demonstrated that faults can lead to DDCs in the current signal, which can induce unwanted oscillations in the phasor measurements. To address this, three methods namely, method (a), (b), and (c) have been proposed and compared with four other methods, including the conventional FCDFT, Cosine Filter (CF), CharmDF [20], and Modified DFT (MDFT) [12].

FIGURE 19.

IEEE 9 bus system.

1) Test Case for Single Phase to Ground Fault

Simulations are conducted to evaluate the proposed technique’s performance in a single-phase-to-ground fault scenario with varying fault resistance values. The outcomes for all the methods are depicted in Fig. 20, and Fig. 21. For a more detailed analysis of the results, provided a magnified view in Fig. 22. The fault was introduced between buses 8 and 9. The results show that the proposed methods (a), (b), and (c) continue to perform effectively under all conditions, proving their capability to counteract the DDCs efficiently.

FIGURE 20.

Test case for IEEE 9-Bus System: LG fault with 0 (ohms).

FIGURE 21.

Test case for IEEE 9-Bus System: LG fault with 5 (ohms).

FIGURE 22.

Test case for IEEE 9-Bus System: LG fault with 5 (ohms) zoomed portion.

2) Test Case for Three Phase to Ground Fault

To assess the method’s efficacy in three phase to ground fault, with different fault resistances, the suggested technique is simulated, and the results are shown in Figs. 23, and Figs. 24, for all the approaches. For easier analysis of the outcome, the zoomed-in area is displayed in Figs. 25. The fault was introduced between buses 8 and 9. It can be demonstrated that the recommended method continues to work effectively under all conditions, demonstrating its capacity to reduce the DDCs successfully. The evaluation concludes that the FCDFT method exhibits significant errors in all cases, while the CharmDF method struggles with multiple DDCs. The MDFT technique outperforms the CharmDF method, but it is not entirely error-free and is noise-sensitive. Conversely, the proposed methods (a), (b), and (c), delivers error-free phasor estimation in all cases. However, proposed method (c) gives better performance than the other two proposed methods which is evident in Table 10 and Table 11.

FIGURE 23.

Test case for IEEE 9-Bus System: LLLG fault with 0 (ohms).

FIGURE 24.

Test case for IEEE 9-Bus System: LLLG fault with 5 (ohms).

FIGURE 25.

Test case for IEEE 9-Bus System: LLLG fault with 5 (ohms) zoomed portion.

The study compares the performance of three proposed MDSC-based phasor estimation methods (a), (b), and (c), against four well-established methods: FCDFT, Cosine Filter, CharmDF, and MDFT. The comparison focuses on key performance metrics, including rise time $(t_{R})$ , settling time $(t_{S})$ , and percentage overshoot $(PO)$ . Across Table 1 to Table 11, it is evident that the proposed methods consistently demonstrate superior performance compared to the traditional methods. For example, in Table 1, it can be observed that the rise time for the proposed method (c) is 4.564, which is significantly lower compared to the other methods. Similarly, the settling time for the proposed method (c) is 3.770, whereas for FCDFT, it is much higher at 18.229. Additionally, for percentage overshoot, the proposed methods (a), (b), and (c), show nearly identical values, while other methods exhibit much higher overshoot values, such as FCDFT at 7.065 and Cosine Filter at 3.684. 1) Accuracy and Speed: The proposed method (c) consistently exhibits the fastest rise and settling times with minimal overshoot in all test scenarios, indicating exceptional accuracy and speed in phasor estimation. 2) Robustness to DDCs: Methods (a), (b), and (c) effectively mitigate the impact of multiple DDCs, outperforming traditional methods like FCDFT and Cosine Filter. 3) Noise Resilience: The proposed methods maintain high performance even in noisy environments (40 dB and 50 dB SNR), whereas methods such as MDFT require additional filtering to achieve similar results. 4) Off-Nominal Frequency: Method (c), in particular, handles off-nominal frequency conditions better than the traditional methods, ensuring accurate phasor estimation under challenging frequency deviations. 5) Computational Efficiency: Despite the use of higher sampling rates, the proposed methods do not significantly increase the computational load, making them suitable for real-time applications.

B. Summary

In a comprehensive comparison of seven phasor estimation methods, three proposed methods (a), (b), and (c) emerged superior to four other established methods, with the proposed method (c) showcasing the best overall performance. This study evaluated these methods across various scenarios, including fault types and fault resistances, under varying sampling rates with harmonics and noise, as well as decaying DC (DDC) components. The results, presented in tables and figures, reveal the strengths and weaknesses of each method. For instance, while computationally efficient, traditional DFT-based algorithms struggle with low sampling rates (16 or 32 samples) and are susceptible to DDC interference, leading to inaccurate phasor estimations. MDSC-based methods, on the other hand, use 168 or even 300 samples and are more accurate and stable against DDCs. This makes them better for real-time fault detection in relay applications. However, even the most advanced methods have their limitations. The proposed methods (a) and (b), while effective, rely on an averaging filter, making them less ideal for scenarios with multiple DDCs when a 5-time constant is considered. The third method, despite its overall superior performance, necessitates an additional filter called a harmonic pre-suppression filter to address even harmonics.

This comparative analysis underscores the importance of tailoring phasor estimation techniques to specific applications. With their higher sampling rates and DDC resilience, MDSC-based methods are better for relay protection, where finding faults quickly and correctly is very important. However, for complex fault scenarios, a combination of advanced filtering and estimation techniques, like the proposed method (c), might be necessary to achieve optimal performance. Finally, while the proposed method (c) emerges as a promising solution for accurate phasor estimation, careful consideration of the specific application requirements and potential drawbacks is crucial in selecting the most appropriate technique. Future research could explore hybrid approaches that combine the strengths of different methods to overcome individual limitations and further enhance overall performance.

In addition to the frequency-domain methods discussed in this paper, time-domain, and time-frequency domain approaches are also prevalent in the literature [32]. The MDSC method demonstrates superior performance compared to these existing techniques, particularly in several critical aspects. Notably, it exhibits remarkable robustness to decaying DC (DDC) components, ensuring accurate signal representation even in challenging conditions. Furthermore, this method is designed for high sampling rates, offering enhanced computational efficiency without sacrificing performance. The MDSC also showcases impressive noise resilience, effectively mitigating the impact of noise on signal integrity. Lastly, its adaptability to off-nominal frequencies positions it as a versatile solution in diverse application scenarios.

SECTION V. Conclusion

This study introduces a new phasor estimation method based on the Multiple Delayed Signal Cancellation (MDSC) technique. The MDSC technique estimates the fundamental phasor current signal in a faulty power transmission line, including one or more decaying DC (DCC) components, such as a primary and secondary DDC. Three distinct methods, designated as proposed methods (a) high-frequency modulation technique, (b) high-frequency modulation technique based on down-sampling, and (c) four half cycle based approach, are introduced to enhance the precision of phasor measurements and estimate the DDC offset. The estimated DDC is then removed from the original fault signal to yield a clean fundamental phasor using the MDSC filter. These methods exhibit resistance to multiple DDCs.

In comparison to previous methodologies, the proposed methods (a), (b), and (c) offer several key advantages. These include harmonic elimination, adaptability to varying fault parameters, effectiveness with multiple DDC components, enhanced accuracy, superior performance under off-nominal frequency conditions, noise reduction capability, low computational load, compatibility with different data windows, and simplicity. The proposed methods do not significantly augment the computational demands of the DFT algorithm. By employing higher sampling rates, the proposed method can enhance the performance of numerical relays in several ways, such as improved measurement accuracy, reduced response latency, and an enhanced ability to detect and classify faults. Finally, the proposed method (c) performs better than all other methods, which is evident from the figure and tabulations. These attributes make the proposed method (c) well-suited for power system protection relaying applications.