An Approach to Determine Noise Model Parameter for Submicron MOSFET from RF Noise Figure Measurement

An extraction method to obtain the noise model parameter $T_{\mathrm { d}}$ in deep submicron MOSFETs directly from radio frequency (RF) scattering parameters and noise figure measurements is presented. A simplified noise equivalent circuit, along with closed-form solutions to calculate the RF noise figure of MOSFET is developed. On-wafer experimental verification is presented and a comparison with tuner based method is given. Good agreement is obtained between simulated and measured results for $16\times 1\times 2{{\mu }\rm m}$ (number of gate fingers $\times $ unit gatewidth $\times $ cells) gatelength MOSFETs.

SECTION I. Introduction

Thanks to recent advances in CMOS technology, the MOSFET offers the advantages of low cost, high integration, and the possibility of a single-chip solution. The understanding and modeling of thermal noise is crucial since it is the dominant noise source in the device at RF frequencies [1], [2], [3]. From the circuit point of view, the MOSFET device can be treated as a closed box of a noisy two port. The noise behavior of a linear noisy two-port network can be characterized by the four noise parameters, minimum noise figure $F_{\min }$ , noise resistance $R_{n}$ , optimum source conductance $G_{opt}$ and optimum source susceptance $B_{opt}$ [4].

The common used methods for determination of noise parameters for semiconductor devices can be categorized into the tuner-based methods and $50\Omega$ noise figure measurement system based methods. The tuner-based methods rely on the source-pull measurement technique to extract the noise parameters from a large set of parameters (source impedances and noise figures) at a single frequency, and normally 16 impedance points are required. Although this method gives accurate results, it is time consuming and requires an expensive automatic broadband microwave tuner that involves complex calibration procedures [5], [6], [7], [8], [9]. Alternatively, $50\Omega$ noise figure measurement system is less complicated to use and easier to calibrate, and it is desirable to determine four noise parameters by using the equivalent transistor noise model (such as Pospieszalski [10] and Cappy models [11]) to provide additional information. Unfortunately, this kind of methods heavily relies on the complex noise and signal correlation matrix computations to embed the parasitic to obtain the four noise parameters, and the analytical expression between noise figure and channel noise model parameter $T_{\mathrm { d}}$ is not available directly [12], [13], [14], [15], [16], [17].

In order to overcome the limitations of previous literature, we have developed an extraction method to obtain the channel noise model parameter $T_{\mathrm { d}}$ based on Pospieszalski model in submicron MOSFETs directly from RF scattering parameters and noise figure measurements. Noted noise parameter extraction is based on Pospiesczalski noise model, which neglects correlation between induced gate current noise and channel noise. The main advantage of this method is based on the common used circuit thermal noise calculation without complicated matrix computations. An extraction method to obtain the noise model parameter $T_{\mathrm { d}}$ in deep submicron MOSFETs directly from RF scattering parameters and noise figure measurements is presented. A simplified noise equivalent circuit, along with closed-form solutions to calculate the RF noise figure of MOSFET is developed.

This paper is organized as follows. Section II gives the simplified noise equivalent circuit model of the MOSFET. Sections II and III are dedicated to the derivation of analytical expressions for the corresponding noise figure based on a simplified noise model. A comparison between the new expressions and experimental data measured on MOSFETs is presented in Section IV. The conclusion is given in Section IV.

SECTION II. Equivalent Circuit Model

A. Conventional Equivalent Circuit Model

The complete MOSFET small signal and noise equivalent circuit model is shown in Fig. 2. Fig. 2 (a) shows the extrinsic network and Fig. 2 (b) the intrinsic network, respectively. where $L_{g}$ , $L_{\mathrm { d}}$ and $L_{s}$ represent the feedline inductances, respectively. In Pospieszalski’s model, the equivalent temperature parameters $T_{g}$ and $T_{\mathrm { d}}$ are assigned to the resistances $R_{gs}$ and $g_{ds}$ . Both resistances contribute uncorrelated thermal noise.

FIGURE 1.

Tuner-based noise measurement system and 50 ohm noise measurement system.

FIGURE 2.

Conventional noise circuit model for MOSFET.

FIGURE 3.

Simplified noise circuit model for MOSFET noise factor calculation.

These two noise sources are characterized by their mean quadratic value in a bandwidth $\Delta f$ centered on the frequency f, and can be expressed as following [10]:

$$\begin{align*} \overline {e_{gs}^{2}}=& 4kT_{g}R_{gs}\Delta f \tag {1}\\ \overline {i_{ds}^{2}}=& 4kT_{\mathrm { d}}/R_{ds}\Delta f \tag {2}\end{align*}$$

The output current noise source models a noise process which produces noise current only a drain circuit. The noise temperature $T_{g}$ can be simply equal to the ambient temperature under low noise application bias condition (i.e., $T_{g} = T_{o}$ ).

The six noise sources $\overline {e_{oxg}^{2}}$ , $\overline {e_{oxd}^{2}}$ , $\overline {e_{sub}^{2}}$ , $\overline {e_{g}^{2}}$ , $\overline {e_{\mathrm { d}}^{2}}$ and $\overline {e_{s}^{2}}$ represent the noisy behavior of the access resistances $R_{oxg}$ , $R_{oxd}$ , $R_{sub}$ , $R_{g}$ , $R_{\mathrm { d}}$ and $R_{s}$ , and are simply given by

$$\begin{equation*} \overline {e_{i}^{2}} = 4kT_{o}R_{i}\Delta f~(\rm i = oxg, oxd, sub, g, d,s) \tag {3}\end{equation*}$$ where q is the electronic charge, k is Boltzmann’s constant, $T_{o}$ is the ambient temperature.

B. Simplified Equivalent Circuit Model

From the point of view of MOSFET noise factor calculation, four features can be used to simplify the conventional noise circuit model:

1. In the low frequency range, the contribution of extrinsic inductances can be neglected due to the length of device feedlines are kept as short as possible normally.

2. Based on the noise circuit node analysis method, the extrinsic thermal noise sources $\overline {e_{gs}^{2}}$ , $\overline {e_{g}^{2}}$ and $\overline {e_{s}^{2}}$ can be regards as a single noise source which generated by single resistance. It is very useful to calculation of the noise figure of the device.

3. The noise sources $\overline {e_{\mathrm { d}}^{2}}$ , $\overline {e_{oxd}^{2}}$ and $\overline {e_{sub}^{2}}$ are ignored duo to the contributions to noise figure are reduced by device available power gain.

4. The extrinsic drain resistance $R_{\mathrm { d}}$ can be regards as a load resistance in series with the input impedance of next stage.

Based on the noise circuit node analysis method, the noise factor can be expressed as following [18], [19]:

$$\begin{equation*} F_{50} = 1 + \frac {\overline {v_{no}^{2}}}{4kT_{o}R_{o}|A_{V}|^{2}} \tag {4}\end{equation*}$$

Fig. 2 shows the simplified noise circuit model for MOSFET noise factor calculation, where $R_{t} = R_{g} + R_{s} + R_{gs}$ , and the thermal noise is $\overline {e_{t}^{2}} = 4kT_{g}R_{t}\Delta f$ . The detail procedure consists of two steps: 1) combination of $R_{s}$ and $R_{g}$ , and the transconductance and output resistance have been changed. 2) combination of intrinsic resistance $R_{gs}$ and extrinsic resistances.

In order to guarantee the voltage gain $A_{V}$ (the ratio from output port voltage to the source voltage) must be remain invariant. i.e.: $A_{V}^{s} \approx A_{V}$ . The corresponding transconductance and output resistance become:

$$\begin{align*} g_{mo}^{\prime }=& g_{mo}/\left ({{1 + g_{mo}R_{s}}}\right ) \tag {5}\\ R_{ds}^{\prime }=& R_{ds}\left ({{1 + g_{mo}R_{s}}}\right ). \tag {6}\end{align*}$$ with

$R_{\mathrm { d}}^{\prime } = R_{\mathrm { d}} + R_{s}$ $\overline {v_{no}^{2}}$

is the total output noise voltage density without source impedance, which consists of the noise contribution from $R_{ds}$ , $R_{t}$ and $R_{oxg}$ ., i.e.:

$$\begin{equation*} \overline {v_{no}^{2}} = \overline {v_{ds}^{2}} + \overline {v_{t}^{2}} + \overline {v_{oxg}^{2}} \tag {7}\end{equation*}$$

$A_{V}$ is the voltage gain:

$$\begin{align*} A_{V}=& \frac {1}{R_{o}\left ({{M_{1}^{\ }\ M_{3} - M_{2}/R_{t}}}\right )} \tag {8}\\& {\mathrm { with}} \\ M_{1}=& \left [{{ 1 + j\omega \left ({{C_{gs} + C_{gd}}}\right )R_{t}}}\right ] M_{2} + j\omega C_{gd}R_{t} \\ M_{2}=& \frac {1 + j\omega C_{gd}R_{L}}{\left ({{g_{mo} - j\omega C_{gd}}}\right )R_{L}} \\ M_{3}=& \frac {1}{R_{t}} + \frac {1}{R_{o}} + Y_{oxg} \\ Y_{oxg}=& \frac {j\omega C_{oxg}}{1 + j\omega C_{oxg}R_{oxg}}\end{align*}$$

Normally, the source impedance and load impedance are set to $50~\Omega$ (i.e., $R_{o} = R_{L} = 50\Omega$ ) in standard microwave system.

The noise voltage contributed at the output port by $R_{ds}$ can be expressed as:

$$\begin{align*} \overline {v_{ds}^{2}}=& \frac {4kT_{\mathrm { d}}}{R_{ds}^{\prime }}\left |{{ \frac {R_{L}}{N} }}\right |^{2} \tag {9}\\ R_{L}=& \frac {R_{ds}\left ({{R_{\mathrm { d}}^{\prime } + R_{o}}}\right )}{R_{ds} + R_{\mathrm { d}}^{\prime } + R_{o}} \\ N=& 1 + j\omega C_{gd}R_{L} + \frac {j\omega C_{gd}g_{mo}^{\prime }R_{L}\left ({{R_{o} + R_{t}}}\right )}{1 + j\omega \left ({{C_{gs} + C_{gd}}}\right )\left ({{R_{o} + R_{t}}}\right )}\end{align*}$$

The noise voltage contributed at the output port by $R_{t}$ can be expressed as:

$$\begin{equation*} \overline {v_{t}^{2}} = 4kT_{o}R_{t}|A_{V}|^{2} \tag {10}\end{equation*}$$

The noise voltage contributed at the output port by $R_{oxg}$ can be expressed as:

$$\begin{align*} \overline {v_{oxg}^{2}}=& 4kT_{o}R_{oxg}\left |{{ A_{VP} }}\right |^{2} \tag {11}\\ A_{VP}=& \frac {Y_{oxg}}{M_{1}M_{3} - M_{2}/R_{t}}\end{align*}$$

It is obviously that noise model parameter $T_{\mathrm { d}}$ can be directly determined from noise figure measurement.

$$\begin{equation*} \frac {T_{\mathrm { d}}}{T_{o}} = \frac {\left [{{\left ({{F_{50} - 1}}\right )R_{o} - R_{t}}}\right ]|A_{V}|^{2} - R_{pg}|A_{VP}|^{2}}{\left |{{ R_{L}/N }}\right |^{2}}R_{ds} \tag {12}\end{equation*}$$

Noted the equation (12) is only valid in the low frequency range (normally, less than 26 GHz).

SECTION III. Experimental Verification

In order to verify the above derived expression for channel noise model parameter $T_{d}$ , a $16\times 1\times 2{{\mu }\rm m}$ (number of gate fingers $\times$ unit gatewidth $\times$ cells) with 90nm gate-length NMOSFET transistor has been measured up to 50GHz for S parameters. High frequency noise parameter measurements are carried out on wafer over the frequency range 1-26GHz using an ATN microwave noise measurement system NP5.

A. Small Signal Model Verification

Table 1 gives the MOSFET parasitic parameters, and the extracted values of the small signal elements at a constant drain-source voltage $V_{ds} = 1.0$ V with different gate-source voltage $V_{gs}$ are summarized in Table 2. Fig. 4 compares the measured and modeled S parameters for the $16\times 1\times 2~\mu$ m MOSFET in the frequency range of 1GHz to 50GHz under four different bias conditions. The modeled S parameters agree very well with the measured ones to validate the accuracy of the model. We observed the contribution of non-quasi-static (NQS) resistance $R_{gs}$ leads to significant improvements of the MOSFET small signal and noise model simulations, especially at high frequencies.

TABLE 1 The MOSFET Parasitic Parameters

TABLE 2 Intrinsic parameters ( $V_{ds} = 1.0$ V)

FIGURE 4.

Comparison of modeled and measured S parameters for the $16\times 1\times 2~\mu$ m MOSFET. (a) Bias: $V_{gs} =0.6$ V, $V_{ds} =1.0$ V (b) Bias: $V_{gs} =0.8$ V, $V_{ds} =1.0$ V (c) Bias: $V_{gs} =1.0$ V, $V_{ds} =1.0$ V (d) Bias: $V_{gs} =1.2$ V, $V_{ds} =1.0$ V.

B. Comparison of Voltage Gain

In order to verify the validity of the simplified equivalent model as shown in Fig. 3, Fig. 5 gives the comparison of the voltage gain between conventional model and simplified model. It can be seen that the voltage gain are very close.

FIGURE 5.

Comparison of voltage gain between conventional model and simplified model.

C. Noise Model Verification

Fig. 6 shows the $50\Omega$ noise figure measured results for the $16\times 1.0\times 2~\mu$ m MOSFET. Due to the large variation of noise figure at low frequencies, the drain noise model parameter $T_{\mathrm { d}}$ should be determined in the high frequency range.

FIGURE 6.

$50\Omega$ noise figure measured results for the $16\times 1.0\times 2~\mu$ m MOSFET. Bias: $V_{ds} =1.0$ V.

Fig. 7 and Fig. 8 show the plot of normalized drain current noise model parameter $T_{d}~(T_{\mathrm { d}}/T_{o})$ versus frequency under four different bias conditions ($I_{ds} =1$ .67mA, 6.28mA, 11.0mA, and 16.73mA). Rather $T_{d}$ constant values can be observed from 8GHz to 26GHz to verify the validity of the proposed method.

FIGURE 7.

Extracted noise model parameter for the $16\times 1.0\times 2~\mu$ m MOSFET. Bias: $V_{ds} =1.0$ V.

FIGURE 8.

Extracted noise model parameter for the $16\times 1.0\times 2~\mu$ m MOSFET. Bias: $V_{ds} =0.6$ V.

Fig. 9 shows the ratio of noise model parameter $T_{d}$ and output resistance $R_{\mathrm { ds}}$ versus gate-source voltage $V_{gs}$ and drain-source voltage $V_{ds}$ , It is obviously that $T_{\mathrm { d}}/R_{ds}$ remain invariant with $V_{ds}$ , and increases with increase of $V_{gs}$ . Because of the drain current noise is proportional to $T_{\mathrm { d}}/R_{ds}$ as shown in Eq. (2), that means drain current noise only dependent on the gate-source voltage $V_{gs}$ and independent on the drain-source voltage $V_{ds}$ roughly.

FIGURE 9.

Extracted channel noise parameter versus $V_{gs}$ and $V_{ds}$ .

Once the channel noise model parameter $T_{d}$ is determined, the four noise parameters of whole device can be calculated using the conventional noise model as shown in Fig. 1. Fig. 10 shows the comparison of measured and modeled noise parameters for the $16\times 1.0\times 2~\mu$ m MOSFET under bias condition $V_{gs} =0.8$ V and $V_{ds} =1.0$ V. An excellent agreement over the whole frequency range is obtained.

FIGURE 10.

Comparison of measured and modeled noise parameters for the $16\times 1\times 2~\mu$ m MOSFET. Bias: $V_{gs} =0.8$ V, $V_{ds} =1.0$ V.

Fig. 11 shows the comparison of measured and simulated noise parameters versus gate-source voltage $V_{gs}$ and drain-source voltage $V_{ds}$ . The small discrepancy between modeled and measured $F_{\min }$ , especially under larger $V_{gs}$ bias condition. The largest discrepancy is 0.4 dB for $V_{gs} = V_{ds} = 1.2$ V bias condition. The reason may be the correlation of gate and drain current noise is neglected under high $V_{gs}$ bias condition. It is noticed that the range of optimum bias point $V_{gs}$ is 0.8~0.9V roughly for low noise amplifier design, the phase of optimum reflection coefficient $\Gamma _{opt}$ remains invariant with respect to $V_{gs}$ and $V_{ds}$ due to the variation of gate-source capacitance $C_{gs}$ and gate-drain capacitance $C_{gd}$ is very small.

FIGURE 11.

Comparison of measured and simulated noise parameters versus $V_{gs}$ and $V_{ds}$ at 16GHz.

The S-parameter and noise analyses of the devices were performed on the basis of a classical MOSFET small-signal equivalent circuit, as shown in Fig. 1. Such an equivalent circuit keeps valid for advanced node technology (such as FinFETs), as demonstrated in [20] and [21]. Therefore, we believe the proposed method is very useful for the noise modeling and parameter extraction for the device fabricated by current node technology.

SECTION IV. Conclusion

In this paper, we have proposed an approach for determination of the channel noise model parameter Td in deep submicron MOSFETs directly from radio frequency (RF) scattering parameters and noise figure measurements. The expression of ${T}_{d}$ is derived from a simplified noise equivalent circuit. On-wafer experimental verification is presented and a comparison with tuner based method is given. The validity of the new approach is proved by comparison with measured S-parameter up to 50GHz and noise parameters up to 26GHz in multi-bias region. Good agreement is obtained between simulated and measured results up to 26GHz for $16\times 1\times 2{{\mu }\rm m}$ (number of gate fingers $\times$ unit gatewidth $\times$ cells) 90 nm gatelength MOSFETs.