Abstract:
A vertical Bloch line (VBL) memory test chip which attains complete operation has been developed. The test chip is composed of a ring-shaped domain, stabilized in a garne...Show MoreMetadata
Abstract:
A vertical Bloch line (VBL) memory test chip which attains complete operation has been developed. The test chip is composed of a ring-shaped domain, stabilized in a garnet groove as a VBL pair circulation track which forms the data storage register, a current access major track for a data access read/write channel and a read/write gate between the ring-shaped domain and the major track for transforming a VBL information into bubble information or the inverse operation. The VBL propagation on the straight wall of the ring-shaped domain is found to have the reasonable operation bias margin of approximately 10 Oe. The VBL circulation around the outer domain wall of the domain is confirmed in high bias field range. Bubble propagation bias margins for major track are about 13 Oe, sufficient for overlapping the VBL circulation margins. Quasi-static ring-shaped domain head stretching and the stretched domain chopping for read/write gate operations have been successfully operated, while the dynamic domain head stretching permits VBL injection. VBL memory devices with large capacity may clearly be constructed with ring-shaped domain arrays and the other functional elements mentioned above.
Published in: IEEE Transactions on Magnetics ( Volume: 23, Issue: 5, September 1987)