A Temporal Noise Reduction via 40% Enhanced Conversion Gain in Dual-Pixel CMOS Image Sensor with Full-Depth Deep-Trench Isolation and Locally Lowered-Stack Technology

In this paper, we demonstrate a dual-pixel CMOS image sensor (CIS) with full-depth deep-trench isolation (FDTI) and locally lowered-stack (LLS) structure. When the LLS structure is adopted, the floating diffusion (FD) metal capacitance is dramatically reduced, resulting in a 40% increase in conversion gain (CG) and a 25% improvement in temporal noise (TN). We also present TN analysis from the perspective of the feedback circuit scheme.

Introduction

Recently, superior performances of CMOS image sensors (CIS) are required for various types of cameras, especially for high-end mobile devices. To achieve these demands, full-depth deep-trench isolation (FDTI) technology with dual-pixel structure has several advantages such as phase-detection autofocus (PDAF), high resolution with smaller pixel size, color crosstalk reduction, and increase of full well capacity (FWC), thereby enhancing image quality [1], [2]. However, there is a limitation to enhancing conversion gain (CG) because the FD capacitance cannot be reduced below a certain value in the FDTI dual-pixel, compared to single-pixel structure. Fig. 1(a) shows that metal interconnection should be required for floating diffusion (FD) sharing in FDTI pixels, due to the unique structure characteristics that are completely separated between photodiodes (PD). Based on the motivation, we propose a locally lowered-stack (LLS) technology that lowers only the height and the thickness of FD metal interconnection, resulting in further reduction of , as shown in Fig. 1(b). We demonstrate the LLS in FDTI dual-pixel CIS, followed by discussing the pixel characteristics and its TN analysis.