Abstract:
Thin-film transistors (TFTs) are typically made with a non-self-aligned bottom-gate process, which causes large parasitic capacitance from the gate and source/drain (S/D)...Show MoreMetadata
Abstract:
Thin-film transistors (TFTs) are typically made with a non-self-aligned bottom-gate process, which causes large parasitic capacitance from the gate and source/drain (S/D) overlaps. While a top-gate structure can effectively reduce the parasitic capacitance, it can lead to a large series resistance between the gated channel and the S/D contacts ( Fig. 1(a) ) due to high resistivity of the as-deposited semiconductor (ZnO in our case). We use a self-aligned plasma treatment ( Fig. 1(b) ) to lower the resistivity outside of the channel region. In the literature, oxygen strongly affects the resistivity of ZnO, as oxygen vacancies are a common defect and donor in ZnO [1] . However, oxygen plasma treatment has been reported to raise the mobility but reduce the carrier concentration [2] , or increase the carrier concentration but reduce the mobility [3] . ZnO resistivity may increase up to 10 7 mΩ·cm [4] or be reduced to 2 mΩ·cm [3] , depending on the ZnO deposition method (sputtering, sol-gel, etc.) and plasma treatment conditions, which can yield different microstructures in the ZnO thin film. In our work, we exposed top-gate nanocrystalline ZnO TFTs to an O-plasma. A self-aligned plasma treatment raised the output saturation current by a factor of ×100. But surprisingly, we find that it is the exposure to ambient air, not to the plasma, that is decisive in reducing the series resistance in our work.
Published in: 2024 Device Research Conference (DRC)
Date of Conference: 24-26 June 2024
Date Added to IEEE Xplore: 29 July 2024
ISBN Information: