Small-Signal Modeling of Multiphase V2 Constant On-Time Control with Phase Overlapping | IEEE Conference Publication | IEEE Xplore

Small-Signal Modeling of Multiphase V2 Constant On-Time Control with Phase Overlapping


Abstract:

Multiphase V2 constant-on time control (COT) based on pulse distribution method is increasingly used in voltage regulators for CPUs and GPUs because of its good light-loa...Show More

Abstract:

Multiphase V2 constant-on time control (COT) based on pulse distribution method is increasingly used in voltage regulators for CPUs and GPUs because of its good light-load efficiency, fast transient response, and simple structure. When the duty cycle of an N phase V2 COT controlled buck exceeds 1/N, the output voltage exhibits variable on-time and off-time modulation from a small-signal perspective. Hence, single-phase V2 COT control models cannot be extended to the multiphase V2 control in the phase overlapping regions (or when D>1/N). To address this issue, this work presents a general small-signal model of multiphase V2 COT control architectures for the whole duty cycle range based on describing function method. The proposed models for multiphase V2 COT control architectures are verified using SIMPLIS simulation and experimental results from a twelve phase V2 COT controlled buck platform.
Date of Conference: 25-29 February 2024
Date Added to IEEE Xplore: 02 May 2024
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Conference Location: Long Beach, CA, USA

I. Introduction

The multicore processors in CPUs and GPUs of laptops, servers, and other computing devices operate primarily in sleep mode, introduce fast-changing load current profiles in turbo-boost mode, and have tight voltage tolerances. According to Intel’s VR 12.5 and 13 specifications, the load current step and slew rate in turbo-boost mode can reach 220A and 1000A/us, respectively [1]. Moreover, the voltage tolerance band is less than 3% of their nominal output voltage. Hence, these processors require voltage regulators (VRs) with good light-load (sleep-mode) efficiency, high voltage loop bandwidth, and a fast load transient response.

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References

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