CMOS analog integrated circuit for fuzzy c-means clustering

At present, neurofuzzy techniques are attractive to approximate pattern recognition solutions when they are implemented as parallel systems with adaptive capability. in particular, the clustering of data groups and their recognition by the fuzzy c-means approach is very efficient in this type of systems. In this work we show the parallel analog circuits in CMOS technology dedicated to compute in real-time the fuzzy c-means algorithm. The circuits are composed by MOS transistors working in weak inversion regime for current-mode signal representation, which reduces active area and interconnection complexity. The signal flow in this silicon chip is derived from a layer structure with specific arithmetic operation nodes.

Introduction

The fuzzy c-means algorithm is a mathematical tool for analyzing groups of vector data based on clusters. In fact, it is the basis of finding optimal prototype vectors, from which the input space is compared employing fuzzy values expressed as membership degrees. Therefore, this algorithm can be employed for example in image segmentation, where the main analysis depends on finding a set of boundaries among complex regions. However, systems supporting this type of algorithm would demand long time for a unit processing cycle. In this context, this work is aimed at the VLSI design of CMOS circuits for computing in parallel and in analog manner the fuzzy c-means process as a recognition task for classification. In fact, current-mode circuits approximate complex arithmetic functions employing small silicon area.