Single-inductor four-phase power-clock generator for positive-feedback adiabatic logic gates

Adiabatic logic families require a power-clock generator (PCG) for the recovery of energy. In this paper a four-phase PCG for positive feedback adiabatic logic with only one external inductor is presented. Closed form results for optimized design are obtained from a simple analysis of the scheme. An error below 7% with respect to simulations confirms the validity of the approach. Comparisons with conventional CMOS systems, functionally similar to the adiabatic ones, show two to four times energy reduction.

1. INTRODUCTION

In the last years many circuit families based on the adiabatic switching principle [1]–[7] have been proposed in the literature as solutions for very low-power electronic applications. The main feature of these circuits is the recovery of the energy stored on the circuit capacitances, which is returned to the supply instead of being dissipated in the circuit. However, an ac power-supply, named power-clock, is needed to allow recycling.